Operation Program Rom Pin Descriptions; Ram Pin Descriptions - Casio SF-7900E Service Manual & Parts List

Pin No. Name
46 RA20
47 R15
48 VSS(GND)
49 VH3(VCC)
50 VL3
51 CAC
52 MS7
53 MSO
54 MS4
55 MS1
56 MS5
57 MS2
58 MS6
59 BZ1
60 OTP
61 BZ2
62 SWO
63 VH4(VCC)
64 TXO

Operation program ROM pin descriptions

Pin No. Name
2~12,23, A0~A17
25~30
13~15, 17~21 O0~O7
16 GND
22 CE
24 OE
31 A18
1, 32 VPP, VCC

RAM pin descriptions

Pin No. Name
3~12, 23 A0~A15
25~28, 31
13~15, 17~21 IO0~IO7
16 GND
22 S1
24 OE
29 W
32 VCC
In/Out Description
Out Not used
Out Address bus
In GND terminal
In 9V input
In 6V input
Out Address bus
Out Address bus
Out Chip enable signal for ROM (Not used)
Out Chip select signal for RAM (Not used)
Out Chip select signal
Out Not used
Out Not used
Out Chip select signal
Out Buzzer signal
In Connected to GND
Out Buzzer signal
Out Main switch control signal
In 9V input
Out Transmission data output terminal
In/Out Status Status
of OFF of ON
In L Pulse
Out L Pulse
In L L
In H Pulse
In L Pulse
In L Pulse
In L H
In/Out Status Status
of OFF of ON
In L Pulse
Out L Pulse
In L L
In H Pulse
In L Pulse
In H Pulse
In L H
— 15 —
Description
Address bus line (A0~A14, RA15~RA17)
Data bus line (IO0~IO7)
GND terminal
Chip enable signal from Gate array
Output enable signal from Gate array
Address line (RA18)
VDD terminal
Description
Address bus line (A0~A15)
Data bus line (IO0~IO7)
GND terminal
Chip enable signal from Gate array
Output enable signal from Gate array
Write enable signal from CPU
VDD terminal