Character Generator Rom Pin Descriptions (Hd62063B01) - Casio SF-8500 Service Manual & Parts List

Pin No. Name
3 SUB IN
4 SUB OUT
5 V COMP0
6 V COMP1
7 V COMP2
8 VSS
9 V1
10 V2
11 V3
12 V4
13~16 VDIV1~4
17 C1N
18 C2P
20 C1P
21 C2N
23 SUB CONT
24 EROUT
25 VFB
26 MIN
27 MAX
28 UPDOWN
29 CLOCK
30 SET

10-6. Character generator ROM pin descriptions (HD62063B01)

Pin No. Name
1, 7~12, 23 NC
2 BLD
3 VOSC
4, 20 GND
5, 6 OSI/OSO
13 TNL
14, 19 IN1+, IN2+
15, 32 VSS1, VSS2
16, 21 IN1-, IN2-
17, 22 OUT1, OUT2
18 TNH
24 IN
25 OUT
26` 27 BZ1, 2
28 INT
29, 30 CEH, CEL
31 CED
33 EN
34~37 IO3~IO0
38~42 A0~A3, A15
43 WEB
44 CSB
In/Out Status Status
of OFF of ON
In +3V +3V
Out H H
Out H H
Out H H
Out H H
Out H -7V
Out L 3V
Out L 2V
Out H -5V
Out H -6V
** H Wave
** GND Wave
** 3V Wave
** 3V Wave
** GND Wave
In L L
Out H Wave
** H Wave
In 5V 5V
In %v 5V
In H H
In L L
In H H
In/Out Status Status
of OFF of ON
** ** **
In L L
In 3V 3V
In L L
In Pulse Pulse
Out ** **
In H H
In L L
In H H
Out ** **
Out ** **
In L Pulse
Out H Pulse
Out L L
Out H H
Out H Pulse
In H Pulse
In L H
In/Out L Pulse
In L Pulse
In H Pulse
In H Pulse
Description
Back-up battery detection input
Back-up battery detection output (less than 2.5V..."L")
Battery detection signal (less than 3.7V..."L")
Battery detection signal (less than 4.4V..."L")
Battery detection signal (less than 4.7V..."L")
LCD drive power VREG
LCD drive power V1
LCD drive power V2
LCD drive power V3
LCD drive power V4
Voltage drividing terminal for LCD drive power
Negative terminal for doubler capacitor C3
Not used
Positive terminal for doubler capacitor C3
GND
Back-up battery detection clock input
LCD drive basic voltage output
LCD drive basic voltage input
LCD drive MIN voltage setting terminal
LCD drive MAX voltage setting terminal
LCD contrast control signal input (Up/Down)
LCD contrast clock signal input
Switch signal for contrast ("L"...software, "H"...hardware)
Description
Not used
Not used (Battery voltage detection terminal)
Connected capacitor
GND terminal
Exterminal clock terminal (32.768 KHz)
Not used
Connected to VDD
GND terminal
Connected to VDD
Not used
Not used
Power on key input terminal
K10 terminal for power on
Buzzer signal
Interrupt signal for alarm clock (alarm time..."L")
RAM chip select signal
Chip enable signal from CPU
Enable signal (Buzzer off..."L")
Data bus line (IO0~IO3)
Address bus line (A0~A3, A15)
Write signal
Chip select signal
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