Power Supply Circuit - Casio SF-8500 Service Manual & Parts List

10-2. Power supply circuit

1) Power supply circuit for CPU, GATE ARRAY, CG ROM and RAMs.
When the memory back-up battery or main batteries are set, the voltage supplies at the terminal VDD1
(Pin No.1) of SC371015FU (LSI2) through the diode MA743 (D1).
When LSI2 receives a voltage, the regulated voltage VDD (4.3V~4.7V) will be applied to the VDD lines
from the terminal VO1 (Pin No.2).
HD62076C02 (LSI1), µPD65005GC-566 (LSI3), HD62063B01 (LSI4), and M5M51008AFP-10LL
(LSI5) are connected the VDD lines.
2) Power supply circuit for ROMs
When the GATE ARRAY (LSI3) controls the terminal VOB (Pin No.39) with "L" level, the transistor
2SA1411 (Q1) will be turned ON, then the voltage of the VDD lines will be applied the VCC lines.
The voltage of the ROM (LSI6) is supplied from the VCC lines.
3) Main switch
The CPU (LSI1) detects the informations of the Main switch by the terminal SW (Pin No.36) from the
SWO signal of the GATE ARRAY (LSI3).
4) How to turn the display ON.
When pressing "ON" key under the ON side of the Main switch , the CPU (LSI1) generates the signal
to turn the display ON at the terminal V2ON (Pin No.45).
This signal goes to the terminal VIN (Pin No.31) of the GATE ARRAY (LSI3), then the GATE ARRAY
(LSI3) generates "H" level at the terminal VOT (Pin No.32). When the power supply chip (LSI2) re-
ceives "H" level at the terminal PDB (Pin No.31) from VOT, the LSI2 generates the outputs VSS (Pin
No.8) and V1~V4 (Pin No.9~12) for LCD drivers.
5) How to detect the voltage for the main batteries.
There are three detectors of the main batteries in the circuits.
When the voltage of the VDD lines becomes +4.58V±0.155V, the terminal VCOMP2 (Pin No.7) of the
power supply chip (LSI2) becomes "L" level, then this signal goes t the terminal P7 (Pin No.79) of the
CPU (LSI1) and the terminal BLI (Pin No.29) of the GATE ARRAY (LSI3).
The CPU detects the low battery condition, and the display shows "MAIN POWER SUPPLY GETTING
WEAK".
When the voltage of the VDD lines becomes +4.38V ±0.155V, the terminal VCOMP1 (Pin No.6) of the
power supply chip (LSI2) bocomes "L" level, and the terminal BLI (Pin No.29) of the GATE ARRAY
(LSI3) receives this shignal, then the display turns OFF.
— 16 —