Register Descriptions; Break Address Register A (Bara) - Hitachi SH7095 Hardware User Manual

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6.2

Register Descriptions

6.2.1

Break Address Register A (BARA)

BARAH:
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
BARAL:
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
The two break address registers A—break address register AH (BARAH) and break address
register AL (BARAL)—together form a single group. Both are 16-bit read/write registers.
BARAH stores the upper bits (bits 31 to 16) of the address of the channel A break condition, while
BARAL stores the lower bits (bits 15 to 0). A power-on reset initializes both BARAH and
BARAL to H'0000.
BARAH Bits 15 to 0—Break Address A 31 to 16 (BAA31 to BAA16): These bits store the
upper bit values (bits 31 to 16) of the address of the channel A break condition.
98 Hitachi
15
14
BAA31
BAA30
BAA29
0
0
R/W
R/W
7
6
BAA23
BAA22
BAA21
0
0
R/W
R/W
15
14
BAA15
BAA14
BAA13
0
0
R/W
R/W
7
6
BAA7
BAA6
0
0
R/W
R/W
13
12
BAA28
BAA27
0
0
R/W
R/W
5
4
BAA20
BAA19
0
0
R/W
R/W
13
12
BAA12
BAA11
0
0
R/W
R/W
5
4
BAA5
BAA4
BAA3
0
0
R/W
R/W
11
10
BAA26
BAA25
0
0
R/W
R/W
3
2
BAA18
BAA17
0
0
R/W
R/W
11
10
BA10
BAA9
0
0
R/W
R/W
3
2
BAA2
BAA1
0
0
R/W
R/W
9
8
BAA24
0
0
R/W
R/W
1
0
BAA16
0
0
R/W
R/W
9
8
BAA8
0
0
R/W
R/W
1
0
BAA0
0
0
R/W
R/W

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