Register Descriptions; System Control Register (Syscr) - Hitachi H8/3032 Series Hardware Manual

5.2 Register Descriptions

5.2.1 System Control Register (SYSCR)

SYSCR is an 8-bit readable/writable register that controls software standby mode, selects the
action of the UI bit in CCR, selects the NMI edge, and enables or disables the on-chip RAM.
Only bits 3 and 2 are described here. For the other bits, see section 3.3, System Control Register
(SYSCR).
SYSCR is initialized to H'0B by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit
Initial value
Read/Write
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7 6 5
SSBY STS2 STS1 STS0
0 0 0
R/W R/W R/W
Standby timer
select 2 to 0
Software standby
78
4 3 2
UE NMIEG
0 1 0
R/W R/W R/W R/W
Reserved bit
NMI edge select
Selects the NMI input edge
User bit enable
Selects whether to use CCR bit 6
as a user bit or interrupt mask bit
1 0
— RAME
1 1
R/W
RAM enable