Register Descriptions; System Control Register (Syscr) - Hitachi H8/3006 Hardware Manual

5.2

Register Descriptions

5.2.1

System Control Register (SYSCR)

SYSCR is an 8-bit readable/writable register that controls software standby mode, selects the
action of the UI bit in CCR, selects the NMI edge, and enables or disables the on-chip RAM.
Only bits 3 and 2 are described here. For the other bits, see section 3.3, System Control Register
(SYSCR).
SYSCR is initialized to H'09 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit
SSBY
Initial value
Read/Write R/W
Software standby
80
7 6 5
STS2 STS1
0 0 0
R/W R/W
Standby timer
select 2 to 0
4 3
STS0 UE NMIEG
0 1
R/W R/W R/W
NMI edge select
Selects the NMI input edge
User bit enable
Selects whether to use the UI bit in
CCR as a user bit or interrupt mask bit
2 1 0
SSOE RAME
0 0 1
R/W R/W
RAM enable
Software standby
output port enable