Data Communication Between Cpu And Eeprom - Casio 120CR Service Manual

5-3. Data communication between CPU and EEPROM (NOT USED FOR USA MODEL)
CPU
Pin No.23
Pin No.14
Pin No.15
Pin No.16
EEPROM is a memory to possible write/erase by electricity .
The BR93LC46A privides efficient nonvolatile read/write memory arranged as 64 registers of 16
bits each.
(64 words X 16 bits = 1024 bits)
[Block diagram]
CS
Command code
controller
SK
Clock generator
DI
Command
register
DO
Dammy bit
EEPROM
1
CS
2
SK
3
BR93LC46A
DI
4
DO
Power detection
Write
protection
Address Address
6 bits
buffer decorder
Data
R/W
16 bits
register
amplifer
— 10 —
CS : Chip enable
SK : Sirial data clock
DI : Serial data input
DO : Serial data outpu
High voltage
genarator
6 bits
1024 bit
EEPROM array
16 bits