System Backplane 1-Il - Cisco 7513 Hardware Installation And Maintenance Manual

System Backplane
The dual-CyBus
second
interface
Figure
RSP2
The
communication
processor and
Note
Interface
processors
chassis
MAC-layer
in
the Cisco
backplane
Gbps
CyBus
comprises
slots
through
processor
and
1-6
CyBus CyBus
CyBus
slots through
provides distributed
processing
between
high-speed
the system
processor
An RSP2
in or
either slot
connected
to
processors
connected the other
to
memory
identification
addresses for the interface
7513
has an aggregate
interface
slots
processor
12
shows
1-6 the orientation
Figure
on
Orientation the
RSPRSP
CyBus
and
control
for the interface
interface
interface
processors
interface
processor-to-processor
controls both
slot CyBus
one CyBus
unaffected
are by
The two CyBuses
CyBus
device the backplane
on
contains
well
processor ports
as
Physical
bandwidth
of 2.134
gigabits
and CyBus
through
two
of the
CyBuses
Backplane
10
11 12
slots 12
through
and
processors
processor-to-interface
and
CyBus
the the interface
traffic by
generated
are independent of another
one
bank hardware
of
information
chassis-specific
as
Product
Description
per
comprises
controls
Overview
1-11