Flash Memory System And Programming - Philips LPC2119 User Manual

Philips Semiconductors
ARM-based Microcontroller

20. FLASH MEMORY SYSTEM AND PROGRAMMING

This chapter describes the Flash Memory System and the Boot Loader. It also includes In-System Programming (ISP) and In-
Application Programming (IAP) interfaces.
FLASH MEMORY SYSTEM
The Flash Memory System contains 16 sectors for 128 kB part and 17 sectors for 256 kB part. Flash memory begins at address
0 and continues upward. Details may be found in the LPC2119/2129/2292/2294 Memory Addressing chapter.
FLASH BOOT LOADER
The Boot Loader controls initial operation after reset, and also provides the means to accomplish programming of the Flash
memory. This could be initial programming of a blank device, erasure and re-programming of a previously programmed device,
or programming of the Flash memory by the application program in a running system.
FEATURES
• In-System Programming: In-System programming (ISP) is programming as well as reprogramming the on-chip flash memory,
using the boot loader software and a serial port while the part may reside in the end-user system.
• In Application Programming: In-Application (IAP) programming is performing erase and write operation on the on-chip flash
memory, as directed by the end-user application code.
APPLICATIONS
The flash boot loader provides both In-System and In-Application programming interfaces for programming the on-chip flash
memory.
DESCRIPTION
The flash boot loader code is executed every time the part is powered on or reset. The loader can execute the ISP command
handler or the user application code. A LOW level after reset at the P0.14 pin is considered as the external hardware request to
start the ISP command handler. This pin is sampled in software. Asuming that proper signal is present on X1 pin when the rising
edge on RST pin is generated, it may take up to 3 ms before P0.14 is sampled and the decision on wether to continue with user
code or ISP handler is made. If P0.14 is sampled low and the watchdog overflow flag is set, the external hardware request to
start the ISP command handler is ignored. If there is no request for the ISP command handler execution (P0.14 is sampled HIGH
after reset), a search is made for a valid user program. If a valid user program is found then the execution control is transferred
to it. If a valid user program is not found, the auto-baud routine is invoked.
Pin P0.14 that is used as hardware request for ISP requires special attention. Since P0.14 is in high impedance mode after reset,
it is important that the user provides external hardware (a pull-up resistor or other device) to put the pin in a defined state.
Otherwise unintended entry into ISP mode may occur.
Memory map after any reset:
The boot sector is 8 kB in size and resides in the top portion (starting from 0x0001 E000 in 128 kB Flash part and from
0x0003 E000 in 256 kb Flash part) of the on-chip flash memory. After any reset the entire boot sector is also mapped to the top
of the on-chip memory space i.e. the boot sector is also visible in the memory region starting from the address 0x7FFF E000.
Flash Memory System and Programming
LPC2119/2129/2292/2294
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Preliminary User Manual
January 08, 2004