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3.5 Programming View of Addressing Modes
Extensions to indexed addressing modes, indirection, and full 32-bit displacements
provide additional programming capabilities for the CPU32. The following paragraphs
describe addressing techniques and summarize addressing modes from a program-
ming point of view.
Table 3-1 Effective Addressing Mode Categories
Addressing Mode
Data Register Direct
Address Register Direct
Address Register Indirect
Address Register Indirect
with Postincrement
Address Register Indirect
with Predecrement
Address Register Indirect
with Displacement
Address Register Indirect
with Index
(8-Bit Displacement)
Address Register Indirect
with Index
(Base Displacement)
Absolute Short
Absolute Long
Program Counter Indirect
with Displacement
Program Counter Indirect
with Index
(8-Bit Displacement)
Program Counter Indirect
with Index
(Base Displacement)
Immediate
3.5.1 Addressing Capabilities
In the CPU32, setting the base register suppress (BS) bit in the full format extension
word (see Figure 3-2) suppresses use of the base address register in calculating the
EA, allowing any index register to be used in place of the base register. Because any
data register can be an index register, this provides a data register indirect form (Dn).
This mode could also be called register indirect (Rn) because either a data register or
an address register can be used to address memory — an extension of M68000 Fam-
ily addressing capability.
The ability to specify the size and scale of an index register (Xn.SIZE ∗ SCALE) in
these modes provides additional addressing flexibility. When using the SIZE parame-
ter, either the entire contents of the index register can be used, or the least significant
word can be sign extended to provide a 32-bit index value (refer to Figure 3-3).
CPU32
DATA ORGANIZATION AND ADDRESSING CAPABILITIES
REFERENCE MANUAL
Code
Register
Data
000
reg. no.
X
001
reg. no.
—
010
reg.no.
X
011
reg. no.
X
100
reg. no.
X
101
reg.no.
X
110
reg. no.
X
110
reg. no.
X
111
000
X
111
001
X
111
010
X
111
011
X
111
100
X
Memory
Control
Alterable
—
—
—
—
X
X
X
—
X
—
X
X
X
X
X
X
X
X
X
X
—
X
—
X
X
—
Syntax
X
Dn
X
An
X
(An)
X
(An) +
X
– (An)
X
(d
An)
16,
X
(d
, An, Xn)
8
X
(bd, An, Xn)
X
(xxx).W
X
(xxx).L
X
(d
, PC)
16
X
(d
, PC, Xn)
8
—
#(data)
MOTOROLA
3-11
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