Description Of Hardware Interrupt Pins; Algorithm For The Non-Linear Heading Filter - Honeywell HMR3000 User Manual

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5.0 DESCRIPTION OF HARDWARE INTERRUPT PINS

Detail description of the functionality of the Cont./Reset, Operate/Calibrate, Ready/Sleep, Run/Stop switches.

The order of precedence for operation of the switch inputs is as follows (highest first):

Setting "Cont. / Reset" low unconditionally holds the processor in its reset state. No other functions can be

performed until the switch is returned to the "Continue" position.

Setting "Operate / Calibrate" low (Calibrate) forces the processor into Calibrate mode. The "Run / Stop" and

"Ready / Sleep" switches are ignored in this mode. When the switch is set to the Operate position, the unit can

be in either mode depending on the "Select Mode" command bit that can be changed via the serial interface.

The "Select Mode" command bit is initialized to the Operate state on power up.

Setting "Ready / Sleep" low while the unit is not in Calibrate mode forces the unit into a low power state with

measurements and outputs suspended, and with serial inputs ignored. This switch must be returned to the

"Ready" position before a host can send a serial command. When momentarily placed in the "Ready" position,

the processor will run a complete measurement and output cycle (if in Run mode) before suspending operation.

Mechanical switch bounce on this input can be tolerated in the firmware.

Setting "Run / Stop" low stops any output in progress within one character time and prevents further output.

When the switch is in the Run position, the state of the internal Run/Stop command bit controls the unsolicited

output. The internal Run/Stop command bit is initialized to the settings saved in the EEPROM.

The algorithm is a s follows:

Assume CH = current heading

SH = smoothed output

L = tuned setting (integer > 0, 0 = disable)

S = tuned setting (0 < fraction < 1, 0 = disable, max = 0.999985)

Calculate

D = CH - SH (difference)

G = S + S * (D/L)**2 (saturate G as D/L gets large, S <= G <= 1)

SH = SH + D * G (note that SH = CH for G = 1)

These calculations are iterated at the 13.75 Hz rate.

900240 Rev. B

3/01

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