LH79524/LH79525 User's Guide
18.2.2.6 Interrupt Enable Clear Register (INTENCLEAR)
This register clears the individual bits in the INTENABLE Register. Bits [31:0] correspond
to the interrupt number in Table 18-1.
BIT
FIELD
RESET
RW
BIT
FIELD
RESET
RW
ADDR
BITS
31:0 IntEnable Clear
Table 18-13. INTENCLEAR Register
31
30
29
28
27
0
0
0
0
0
WO
WO
WO
WO
WO
15
14
13
12
11
0
0
0
0
0
WO
WO
WO
WO
WO
Table 18-14. INTENCLEAR Fields
NAME
Clear IntEnable Bit Clears bits in the INTENABLE Register.
For each bit:
1 = Clears the corresponding bit in the IntEnable Register
0 = Has no effect
26
25
24
23
IntEnable Clear
0
0
0
0
WO
WO
WO
WO
10
9
8
7
IntEnable Clear
0
0
0
0
WO
WO
WO
WO
0x014
0xFFFFF000 +
DESCRIPTION
Version 1.0
Vectored Interrupt Controller
22
21
20
19
18
0
0
0
0
0
WO
WO
WO
WO
WO
6
5
4
3
2
0
0
0
0
0
WO
WO
WO
WO
WO
17
16
0
0
WO
WO
1
0
0
0
WO
WO
18-9