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φ
V
CC
FWE
*1
MD2 to MD0
RES
SWE bit
Period during which flash memory access is prohibited
(x: Wait time after setting SWE bit)
Period during which flash memory can be programmed
(Execution of program in flash memory prohibited, and data reads other than verify operations
prohibited)
Notes: *1 Except when switching modes, the level of the mode pins (MD2 to MD0) must be fixed until power-
off by pulling the pins up or down.
*2 See section 23.7, Flash Memory Characteristics.
*3 Mode programming setup time t
712
Wait time:
t
OSC1
*3
t
MDS
*3
t
MDS
SWE set
*2
(min) = 200 ns
MDS
Figure 20-26 Power-On/Off Timing (Boot Mode)
Program-
ming/
erasing
Wait time:
100 µs
possible
x
Min 0 µs
SWE cleared
Min 0 µs
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