Motorola DSP56367 User Manual page 396

24-bit digital signal processor
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Equates
;
Register Addresses
M_IPRC
EQU
$FFFFFF
M_IPRP
EQU
$FFFFFE
;
Interrupt Priority Register Core (IPRC)
M_IAL
EQU
$7
M_IAL0
EQU
0
M_IAL1
EQU
1
M_IAL2
EQU
2
M_IBL
EQU
$38
M_IBL0
EQU
3
M_IBL1
EQU
4
M_IBL2
EQU
5
M_ICL
EQU
$1C0
M_ICL0
EQU
6
M_ICL1
EQU
7
M_ICL2
EQU
8
M_IDL
EQU
$E00
M_IDL0
EQU
9
M_IDL1
EQU
10
M_IDL2
EQU
11
M_D0L
EQU
$3000
M_D0L0
EQU
12
M_D0L1
EQU
13
M_D1L
EQU
$C000
M_D1L0
EQU
14
M_D1L1
EQU
15
M_D2L
EQU
$30000
B-6
; Interrupt Priority Register Core
; Interrupt Priority Register Peripheral
; IRQA Mode Mask
; IRQA Mode Interrupt Priority Level (low)
; IRQA Mode Interrupt Priority Level (high)
; IRQA Mode Trigger Mode
; IRQB Mode Mask
; IRQB Mode Interrupt Priority Level (low)
; IRQB Mode Interrupt Priority Level (high)
; IRQB Mode Trigger Mode
; IRQC Mode Mask
; IRQC Mode Interrupt Priority Level (low)
; IRQC Mode Interrupt Priority Level (high)
; IRQC Mode Trigger Mode
; IRQD Mode Mask
; IRQD Mode Interrupt Priority Level (low)
; IRQD Mode Interrupt Priority Level (high)
; IRQD Mode Trigger Mode
; DMA0 Interrupt priority Level Mask
; DMA0 Interrupt Priority Level (low)
; DMA0 Interrupt Priority Level (high)
; DMA1 Interrupt Priority Level Mask
; DMA1 Interrupt Priority Level (low)
; DMA1 Interrupt Priority Level (high)
; DMA2 Interrupt priority Level Mask
DSP56367
MOTOROLA

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