General Registers; Correspondent Table Of Absolute Addresses In The General Registers - NEC PD78052 User Manual

5.2.2 General registers

A general register is mapped at particular addresses (FEE0H to FEFFH) of the data memory. It consists of 4 banks,
each bank consisting of eight 8-bit registers (X, A, C, B, E, D, L and H).
Each register can also be used as an 8-bit register. Two 8-bit registers can be used in pairs as a 16-bit register
(AX, BC, DE and HL).
They can be described in terms of function names (X, A, C, B, E, D, L, H, AX, BC, DE and HL) and absolute names
(R0 to R7 and RP0 to RP3).
Register banks to be used for instruction execution are set with the CPU control instruction (SEL RBn). Because
of the 4-register bank configuration, an efficient program can be created by switching between a register for normal
processing and a register for interruption for each bank.
Table 5-5. Correspondent Table of Absolute Addresses in the General Registers
Bank Register
Functional Name Absolute Name
BANK0 H
L
D
E
B
C
A
X
BANK1 H
L
D
E
B
C
A
X
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CHAPTER 5 CPU ARCHITECTURE
Absolute
Address
R7 FEFFH
R6 FEFEH
R5 FEFDH
R4 FEFCH
R3 FEFBH
R2 FEFAH
R1 FEF9H
R0 FEF8H
R7 FEF7H
R6 FEF6H
R5 FEF5H
R4 FEF4H
R3 FEF3H
R2 FEF2H
R1 FEF1H
R0 FEF0H
Bank Register
Functional Name Absolute Name
BANK2 H R7
L R6
D R5
E R4
B R3
C R2
A R1
X R0
BANK3 H R7
L R6
D R5
E R4
B R3
C R2
A R1
X R0
Absolute
Address
FEEFH
FEEEH
FEEDH
FEECH
FEEBH
FEEAH
FEE9H
FEE8H
FEE7H
FEE6H
FEE5H
FEE4H
FEE3H
FEE2H
FEE1H
FEE0H