Motorola MVME2401-1 Installation And Use Manual page 172

lowercase 5-12
M
M48T59/T559
manufacturers' documents
memory available
memory map
PCI local bus 4-2,
memory maps
MVME240x
VMEbus
memory size 6-11
Memory Size Enable
memory sizes
SDRAM
Motorola Computer Group documents
MPC750 processor
MPIC (MultiProcessor Interrupt Controler)
3-28
MPU initialization
MPU specifications
MVME240x
board layout
EMC regulatory compliance
specifications
MVME240x
cooling requirements
installing
LEDs 2-4
programming
regulatory compliance
status indicators
MVME240x features
MVME240x VME Processor Module
N
I
Negate VMEbus SYSFAIL* Always
N
NETboot enable
D
Network Auto Boot Controller
E
Network Auto Boot enable
X
NIOT debugger command
using 6-10
IN-4
3-27
A-2
B-1
4-3
4-1
4-3
6-11
3-14
3-4
5-3
B-1
1-9
B-4
B-1
B-3
1-21
4-1
B-4
2-4
3-1
6-5
6-9
6-10
6-9
Non-Volatile RAM (NVRAM) 6-1,
NVRAM (BBRAM) configuration area
NVRAM Bootlist
O
operating parameters
operation
parameter (Auto Boot Abort Delay)
parameter (Auto Boot Controller)
parameter (Auto Boot Default String)
parameter (Auto Boot Device)
parameter (Auto Boot Partition Number)
parameter (L2 Cache Parity Enable)
A-1
parameter (Memory Size)
parameter (Negate VMEbus SYSFAIL*
parameter (Network Auto Boot Control-
parameter (NVRAM Bootlist)
parameter (Primary SCSI Bus Negotia-
parameter (Primary SCSI Data Bus
parameter (ROM Boot Enable)
parameter (SCSI bus reset on debugger
parameter (Secondary SCSI identifier)
P
P1 and P2 1-23
1-2
P1 and P2 connectors 1-2,
parallel port 4-8
parity 1-12, 2-5
PC16550 2-5
PCI bus 3-4, 3-23, 3-26, 4-3,
PCI bus latency
PCI expansion 3-23,
connector description/location
Computer Group Literature Center Web Site
6-3
6-6
6-1
6-8
6-8
6-8
6-12
6-11
Always) 6-5
ler) 6-10
6-6
tions) 6-5
Width) 6-5
6-8
startup) 6-5
6-5
C-2
4-6
3-8
3-24
3-24
Index
3-22
6-8
6-8