CHAPTER 5: SETTINGS
A restrike event (FlexLogic operand) is declared if all of the following hold:
•
The current is initially interrupted
•
The breaker status is open
•
An elevated high frequency current condition occurs (if the
the condition is bypassed), and
•
The current subsequently drops out again
The algorithm is illustrated in the following state machine diagram.
Figure 5-194: Algorithm illustration of state machine to detect restrike
In this way, a distinction is made between a self-extinguishing restrike and permanent breaker failure condition. The latter
can be detected by the breaker failure function or a regular instantaneous overcurrent element. Also, a fast succession of
restrikes is picked up by breaker failure or instantaneous overcurrent protection.
The following settings are available for each element.
BREAKER RESTRIKE 1 FUNCTION
— Blocks operation of the breaker restrike detection element.
BRK RSTR 1 BLOCK
— Selects the source of the current for this element. This source must have a valid CT bank
BREAKER RESTRIKE 1 SOURCE
assigned.
— Specifies the pickup level of the overcurrent detector in per-unit values of CT nominal
BREAKER RESTRIKE 1 PICKUP
current.
BREAKER RESTRIKE 1 RESET DELAY
picked up for only 1/8th of the power cycle.
BREAKER RESTRIKE 1 HF DETECT
High-frequency pattern is typical for capacitor bank, cables, and long transmission lines applications.
L90 LINE CURRENT DIFFERENTIAL SYSTEM – INSTRUCTION MANUAL
— Enables and disables operation of the breaker restrike detection element.
— Specifies the reset delay for this element. When set to "0 ms," then FlexLogic operand is
— Enables/disables high-frequency (HF) pattern detection when breaker restrike occurs.
BREAKER RESTRIKE 1 HF DETECT
CONTROL ELEMENTS
setting is Enabled, otherwise
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