Opamp Control Register - Samsung S3F84B8 User Manual

8-bit cmos
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S3F84B8_UM_REV 1.00

15.1.2 OPAMP CONTROL REGISTER

You can use the OPAMP control register, OPACON, for the following purposes:
Enable OPAMP.
Select operating mode.
OPACON is located at address E0H, Set1 Bank1, and is read/write addressable using Register addressing mode.
OP AMP is enabled when OPACON.0=1 and disabled when OPACON.0=0.
When the OP AMP is enabled, the output of OP AMP will be the analog input signal of ADC3.
Not used for S3F84B8
15.1.3 BLOCK DIAGRAM OF OPAMP
OA_N
OA_P
OPAMP Control Register (OPACON)
E0H, Set1, Bank1, R/W
MSB
.7
.6
.5
OPAMP operating mode select bit
0 = off chip mode
1 = on chip mode
Figure 15-1
OPAMP Control Register (OPACON)
-
OPAMP
+
OAEN ( OPACON .0)
Figure 15-2
.4
.3
.2
.1
When on chip mode is enabled (OPACON.1 = 1),
OP_P is internally connected to Ground.
Block Diagram of OPAMP
15-2
15 OPERATIONAL AMPLIFIER
Reset Value: 00h
.0
LSB
OPAMP enable bit
0 = disbale OPAMP
1 = enable OPAMP
ADC3(OA_O)
Onchip_ OPACON .1

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