Power-Down Modes - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00

8.2 POWER-DOWN MODES

8.2.1 STOP MODE
Stop mode is invoked by the STOP (opcode 7FH) instruction. In Stop mode, the operation of the CPU and all
peripherals is halted. In other words, the on-chip main oscillator is stopped and the supply current is reduced to
less than 2A when Low Voltage Reset (LVR) is disabled. All system functions are halted when the clock
"freezes," but the data stored in internal register file is retained. Stop mode can be released in one of the two
ways: by an nRESET signal or an external interrupt.
NOTE: Before executing the STOP instruction, STPCON register must be set to "10100101B".
8.2.1.1 Using RESET to Release Stop Mode
Stop mode is released when the nRESET signal is released and returned to High level. All system and peripheral
control registers are then reset to their default values and the contents of all data registers are retained. A Reset
operation automatically selects a slow clock (f
After the oscillation stabilization interval has elapsed, the CPU executes system initialization routine by fetching
the 16-bit address stored in the first and second bytes of RESET address in ROM.
8.2.1.2 Using an External Interrupt to Release Stop Mode
External interrupts with an RC-delay noise filter circuit can release the Stop mode (Clock-related external
interrupts cannot be used for this purpose). External interrupts INT0-INT6 in the S3F84B8 interrupt structure meet
this criterion.
NOTE: When Stop mode is released by an external interrupt, values in system and peripheral control registers remain
unchanged. Also, when you use an interrupt to release Stop mode, the CLKCON.3 and CLKCON.4 register values
remain unchanged, and the selected clock value is used. Thus, you can also program the duration of oscillation
stabilization interval by putting the appropriate value to BTCON register before entering Stop mode.
The external interrupt is serviced after the Stop mode is released. The interrupt service routine will then return to
the instruction immediately following the STOP instruction.
/16) because CLKCON.3 and CLKCON.4 are cleared to "00B".
x
8-4
8 RESET AND POWER-DOWN