Cs8415A-Cs (X2089A00) Dir (Digital Audio Interface Receiver); S1D13704F00A100 (X3498A00) Lcdc (Lcd Controller) - Yamaha 01v 96 Service Manual

CS8415A-CS (X2089A00) DIR (Digital Audio Interface Receiver)

PIN
NAME I/O
NO.
1 CDOUT O Data out (SPI)
2 /CS I Control port chip select (SPI)
3 /EMPH O Pre-emphasis
4 RXP0 I
AES3/SPDIF receiver port
5 RXN0 I
6 VA+ Positive analog power supply +5V
7 AGND Analog ground
8 FILT O PLL loop filter
9 /RST O Reset
10 RMCK I/O Input section recovered master clock
11 RERR O Receiver error
12 RXP1 I
13 RXP2 I Additional AES3/SPDIF receiver port
14 RXP3 I

S1D13704F00A100 (X3498A00) LCDC (LCD Controller)

PIN
NAME I/O
NO.
1 COREV Power supply +3.3V
DD
2 /WAIT O Wait signal
3 DB15 I/O
4 DB14 I/O
5 DB13 I/O
6 DB12 I/O Data bus
7 DB11 I/O
8 DB10 I/O
9 DB9 I/O
10 IOV Power supply +3.3V
DD
11 DB8 I/O
12 DB7 I/O
13 DB6 I/O
14 DB5 I/O
15 DB4 I/O Data bus
16 DB3 I/O
17 DB2 I/O
18 DB1 I/O
19 DB0 I/O
20 V Ground
SS
21 COREV Power supply +3.3V
DD
22 GPIO0 I/O General purpose input/output
23 FPDAT11 O
24 FPDAT10 O
Panel data
25 FPDAT9 O
26 FPDAT8 O
27 V Ground
SS
28 FPSHIFT O Shift clock
29 IOV Power supply +3.3V
DD
30 FPDAT7 O
31 FPDAT6 O
32 FPDAT5 O
33 FPDAT4 O
Panel data
34 FPDAT3 O
35 FPDAT2 O
36 FPDAT1 O
37 FPDAT0 O
38 FPLINE O Line pulse
39 FPFRAME O Frame pulse
40 V Ground
SS
FUNCTION
FUNCTION
PIN
NAME I/O
NO.
15 RXP4 I Additional AES3/SPDIF receiver port
16 OSCLK I/O Serial audio output bit clock
17 OLRCK I/O Serial audio output left/right clock
18 SDOUT O Serial audio output data
19 INT O Interrupt
20 U O User data
21 OMCK I System clock
22 DGND Digital ground
23 VL+ Positive logic power supply +5V
24 H//S I Hardware/software mode control
25 RXP5 I
Additional AES3/SPDIF receiver port
26 RXP6 I
27 CDIN I Serial control data in (SPI)
28 CCLK I Control port clock
PIN
NAME I/O
NO.
41 COREV Power supply +3.3V
DD
42 DRDY O TFT/D-TFD display enable
43 LCDPWR O LCD power control
44 TESTEN I Test enable input
45 CNF4 I
46 CNF3 I
47 CNF2 I Configure the S1D13704
48 CNF1 I
49 CNF0 I
50 V Ground
SS
51 CLKI I Input clock
52 IOV Power supply +3.3V
DD
53 AB15 I
54 AB14 I
55 AB13 I
56 AB12 I Address bus
57 AB11 I
58 AB10 I
59 AB9 I
60 V Ground
SS
61 COREV Power supply +3.3V
DD
62 AB8 I
63 AB7 I
64 AB6 I
65 AB5 I
66 AB4 I Address bus
67 AB3 I
68 AB2 I
69 AB1 I
70 AB0 I
71 BCLK I System bus clock
72 V Ground
SS
73 /RESET I Reset
74 /CS I Chip select signal
75 /BS I Bus start signal
76 /RD I Read signal
77 /WE0 I Write enable signal for the lower data byte
78 /WE1 I Write enable signal for the upper data byte
79 RD//WR I Read/write signal
80 V Ground
SS
01V96
MAIN: IC501
FUNCTION
MAIN: IC019
FUNCTION
39