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(MsB)
Fl
Pin Name
vo | Active | Signal Description
PEMCIADATA2
High | data bus
63_| GNO2
PCMCIADATA15
64 | JTCLK
T_|
High _| jtag test clock
GND
65 | TAST_L
T | Low | jtag stata machine
119 | CE1_L
© | tow | cardenabie 1
reset
(LSB)
66 _| PCMCIADATAI
10 | High [data bus
PCMCIADATA14
10 | High | data bus
s|
67 | bvdt/statusChg
1 | Low | battery voltage 1/
PCMCIADATA7
(0 | High | data bus
status change
PCMCIADATAIS
10 | High | data bus
68 | GND
PCMCIADATAG
TO | High | data bus
69_| PCMCIADATAO
10 | High | data bus
VOD
70_|
PCMCIADATAS
10 _| High | data bus
125 | PCMCIADATA12
10 | High | data bus
71_|
POMCIAADRO
10 | High | address bus
126 | PCMCIADATAS:
10 | High | data bus
72 | BVD2/SPKR
'
Low | battery voltage 2/
127 | PCMCIADATA11
10 | Low | databus
speaker (not
128 | TMS
o
High _| jtag control input
a
a)
129 | TOO
© | High | jtag serial data out
73_| POMCIADATAa
10 | High | data bus
Sai Tra caa nied
Orit
dae bos
74_|
NDB
=
731 | PCMCIADATAS
10 | High | data bus
75_| POMCIAADAT
10 | High | address bus
RaRCOEL
Tlie
can dean?
78) {REGS
a
a
es
td
PCMCIAOE_L
© | Low _| output enable
77_| POMCIAADR2
[10
[High | address bus
Sees
Si
ee
eel erga
78 | PCMCIAINPACK_L | | | Low | inputaccess valid
D<31.24>"
79_| PCMCIAADR3
10 | High | address bus
135 | RAMCSI6]
© | High | "tam chip select
80 | GNOS
bankt, byte1,
81_| POMCIAWAIT_L
T_|
tow _| wait cycle indicator
0<23..16>"
82_| PCMCIAADR4
10 | High | address bus
136 | RAMCS{5]
© | High | 'ram chip select,
RESET
© | High | card reset
bank1, byte2,
Gabe
0<15..8>"
PCMCIAADAS
137 | RAMCSI4)
© | High | "ram chip select,
PCMCIAADRE
0
posse
GND
———
PCMCIAADR25
PA
a
Rat cee
89_| PCMCIAADA7
10 | High | address bus
| pest. 24>"
90_| POMCIAADR24
10 | High | address bus
RAMCSI2]
© | fag | "am chip eslect.
91 _| POMCIAADR12
TO | High | address bus
| banko, bytet,
92 | VOD
D<23..16>"
93 | PCMCIAADR23
| 10 | High | address bus
RAMCS{1]
© | High | 'ram chip select,
94 | PCMCIAADAI5
| 10 | High | address bus
| banko, byte2,
95_| POMCIAADR22
10 | High | address bus
USB BS
96 | PCMCIAADR16
| 10 | High | address bus
RAMCS(0]
Or)
High
hae re esas
97_| PCMCIAADR21
10 | High | address bus
ese
98 | GND
l
SN
i
T
99 | BUSY/INTAEQ_L
1]
tow | card busy/cara
ae
ire
Seneca
interrupt
connection
100 | PEMCIAADA20
10 | High _| address bus
eS
or
fnnans | saacayea
101 | WE_PRGM_L
10 | High | write enable
eee ke
ORTENEDS
|
:
OSC40MIN
T_| High | 40mhz clock input
103 | PCMCIAADA19
_| 10 | High | address bus
GND
i
104 [PCMCIAADAI4
| IO | High | address bus
RAMWELL
Grice
low:7|
ra wits rable
105 | PCMCIAADA18
10 | High | address bus
RAMOE LS]
ac]
Slaw
asa
106 | VDD
enable, byte0,
[707 [PCMCIAADATS
__| 10 | High | address bus
0<31..24>"
108 | PCMCIAADAI7
TO | High | address bus
RAMOE_L{2]
© | Low | "ram output
109 | PCMCIAADRS
[10
[High | address bus
enable, bytet,
110 | 10_WR_L
[0 | Low | iocycle write
0<23..16>"
111 | PCMCIAADRS
[10
[High | address bus
RAMOE_Lt]
© | tow | "ram output
112 | GND2
Lohr
113 [10_RD_L
|
tow
[io cycle read
Ss
2
eee
114 | PCMCIAADATI
10 | High | address bus
pecbbinn sity
115 | CE2_L
© | Low | cardenable2
D<7..0>"
GND2
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