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6. Power circuit (5V stabilizing power)
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VCC FAULT
TR8: Boosting FET
TRS: Dropping FET
Power circuit operations (5V stabilizing power)
1, 121: (RSSRMSH45B) has the 5.5V regulator and the external
boosting DC/DC convertor control pin to control boosting FET
TR,
1C22 (RNSRGS5O) controls dropping FET TRS. IC21 and 1C22 chip
select is performed by ASIC DC ON signal.
1C21 chip select CE pin stops only the boosting control circuit
when not active (CE = H). (Power save mode)
Though C21 intemal regulator circuit is in standby state, the regu-
late voltage is outputted from VOUT.
This voltage (VOUT) is supplied to ASIC, ARM, ROM, RAM, and
LCD unit.
When ASIC starts power ON operation, IC21 and |C22 are chip-
selected to operate the boosting/dropping circuit of TR&/TRS,
stabilizing the power.
2. 1C21 VOUT pin output voltage is inputted to IC21 voltage detec-
tion pin VDIN. When VDIN falls below 4.SV, IC21 VOOUT supplies
a low output, which is inputted to ASIC as VCC FAULT signal.
Then ASIC terminates the system operation.
When CE = H during the system operation is terminated, VDD is
outputted from IC21 VOUT.
When the input voltage rises above 5.5V, VOUT outputs the regu-
late output of 5.5V.
= Note for servicing
Since the FET used in this circuit is weak in static electricity, use
great care for anti-static-electricity measures such as a grounding
band when servicing.
7. Power circuit (Boosting circuit)
LCD boosting circuit
The power to operate the LCD is generated by the step-type chopper-
'system convertor as described below:
The 32.768MHz clock is inputted to the convertor 1A as the LCD DC
CLK through the internal gate of ASIC. The LCD DC CLK is controlled
by the ASIC gate and applied to the convertor when the power is
tumed on. When the power is tured off, it is fixed to LOW.
When the LCD DC CLK is supplied to the convertor and input 18
becomes HIGH, TR3 is tumed ON/OFF from C18 output 1Y. During
ON period of TR3, coil L is charged with energy. During OFF period
of TR3, coil L discharges the energy.
The output voltage is controlled by zenor DS. When the output ex-
ceed the total of zenor voltage (27V) and IC33 VBE, IC33 is turned
'on. Then C18 input 18 becomes LOW. 1C18 1Y is fixed to LOW until
the output voltage falls, and the convertor
is stopped.
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* Set OFF:
VCC is supplied to 28V output, but it is tuned off (tran-
sistor SW) in LVC (SC3611). So it is not supplied to the
LCO driver.
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