Table of Contents
Advertisement
Section 11
Testing functionality by secondary injection
16.
By enabling the input BLK1PH, operation mode for power swing detection in any phase will be
blocked.
17.
Similarly, operation mode for power swing detection in at least two phases will be blocked by
enabling the input BLK2PH.
18.
Repeat steps 5,
ZOUT and ZIN will be deactivated.
19.
Output signal START will also get activated instantaneously by enabling input EXTERNAL and this
input signal can be configured in ACT to the output derived from some external logics used to
detect power swings. By enabling the input signal BLOCK, the output signal START will be
deactivated.
Testing the inhibit logic of power swing detection function
The following output signals shall be configured to binary output available: ZOUT, measured impedance
within outer impedance boundary and ZIN, measured impedance within inner impedance boundary and
START, power swing detection.
1.
Set X1InFw, R1LIn, X1InRv, R1FInFw, R1FInRv, ArgLd, RLdOutFw, RLdOutRv, kLdRFw and
kLdRRv to values that are in accordance with the selectivity plan and the corresponding operating
characteristic is shown in Figure 24.
2.
Set OperationLdCh to On and set timers tP1, tP2, tW, tH, tR1, tR2 and tEF to their default values.
3.
Enable the input signal REL1PH to detect the power swing in one of the three phases.
Inhibit START output by the presence of residual current
Preconditions
The input signal I0CHECK, residual current (3I0) detection used to inhibit the start output, must be
configured to the output signal STPE on the FDPSPDIS, FRPSPDIS, ZMFPDIS or ZMFCPDIS function.
The input signal BLKI02, block inhibit of the start output for subsequent residual current detection, is
connected to FALSE.
1.
Create a test sequence such that power swing has been detected, which can be done by referring
to steps 5, 6 and 7 described in section
inject voltage in one of the phases accordingly by keeping constant current in all three phases. With
this condition, the output signal START will be activated.
2.
Create a condition such that residual current is measured (that is, earth fault occurs in the power
system) and its value should be above the value seen during unbalanced loading condition. It can
be done by increasing current in one of the phases without disturbing healthy phase currents.
3.
With this condition, I0CHECK connected to STPE output of FDPSPDIS, FRPSPDIS, ZMFPDIS or
ZMFCPDIS function, will be activated and I0CHECK should be activated before the expiration of
timer tR1.
4.
By doing this, the output START will be disappeared after a set time delay of tR1.
5.
If required to block inhibit of start output by the presence of residual current, BLKI02 must be
configured to TRUE and thereby, the output signal START will be maintained as long as the power
swing condition exists.
Inhibit START output by the presence of slow power swings
Preconditions
The input signal BLKI01, block inhibit of the start output for slow power swings is connected to FALSE.
88
6
and 7, and enable the input signal BLOCK. At this condition, the outputs START,
Testing the power swing detection logic ZMBURPSB
© 2017 - 2022 Hitachi Energy. All rights reserved
1MRK 511 409-UUS Rev. K
GUID-1E0D044A-89F5-4382-B78E-0927E271C54E v1
GUID-B1AFF8D6-FD37-47AA-84A4-DD98E920CCA7 v1
and
GUID-29676044-6F5A-4530-B9EA-5EC6752943A5 v1
Phasor measurement unit RES670
Commissioning manual
Advertisement
Table of Contents
