Sharp DX-SX1H Service Manual page 51

IC602 RH-iX1474GEZZ: SACD Data Processor (IX1474GE) (1/2)
Terminal
Pin No.
Input/Output
Name
1 DPCKI Input
2 DVDD3
3 SVCKI Input
4* SVCKO Output
5 DVSS
6 DVDD3
7* NC
8 HDWT Input
9 HDRD Input
10 HCEN Input
11-18 HD0-HD7 Input/Output MPU data bus
19 DVSS
20 DVDD5
21 HINT Output
22,23 HA0, HA1 Input
24 PLCK Output
25*-31* ED0-ED6
32 ED7 Output
33 TEST Input
34 PDON Output
35 PDOP Output
36 RLLD Output
37 LPFN Input
38 LPFO Output
39 VCOF Output
40 SCLO Output
41 AVSS
42 AVR Output
43 VRC
44 PVR Output
45 AVDD
46 RVR2
47 RVDD
48 RFIN Input
49 RVSS
50 RVR1
51 DVR Input
52 DMO Output
53 RASN Output
54 CASN Output
55 MOEN Output
56 MWEN Output
57 DVSS
58 DVDD3
59-68 MA9-MA0 Output
69 DVSS
70 DVDD5
71-78 MD7-MD0 Input/Output External RAM data bus
79-82 SD7-SD4 Output
83 DVSS
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Signal processing reference clock input
— Digital power supply (3.3V)
Servo reference clock input (Oscillation circuit input terminal) 3.3V-I/F feedback resistor built in
Servo reference clock input (Oscillation circuit input terminal)
— Digital power supply (0V)
— Digital power supply (3.3V)
— The use forbidden
MPU write signal
MPU read signal
MPU chip select
— Digital power supply (0V)
— Digital power supply (5V)
MPU interrupt signal (Occurrence of interruption = "L")
MPU address bus
Read channel clock output terminal
— For default adjustment; use by user is forbidden. (NC)
SACD 2 binary data
For default adjustment
PLL phase error signal output (Polarity: -)
PLL phase error signal output (Polarity: +)
PLL detection result output
Inversion input of amplifier for PLL loop filter
Output of amplifier for PLL loop filter
VCO filter terminal
Reference voltage output terminal of built-in comparator
— Analog power supply (0V)
Non-PLL analog reference potential (1.65V)
— Resistance dividing point potential
(For generating analog reference potential: 1.65)
PLL analog reference potential (1.65V)
— Analog power supply (3.3V)
— Secondary reference voltage (For connecting capacitor)
— Dedicated power terminal (3.3V)
RF signal input
— Dedicated power terminal (0V)
— The first reference voltage (For connecting capacitor)
DMO reference potential (1.65V recommended)
DVD disc equalizer output (Ternary PWM + Hiz)
External RAM column address select (Negative logic)
External RAM row address select (Negative logic)
External RAM output enable signal
External RAM read/ write select
— Digital power supply (0V)
— Digital power supply (3.3V)
External RAM address bus
— Digital power supply (0V)
— Digital power supply (5V)
MPEG data output
— Digital power supply (0V)
Function
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DX-SX1H
Remarks
0.5 - 3.3Vpp, feedback resistor built in.
For logic cell
For logic cell
For logic cell
Open
Level TTL
Level TTL
Level TTL
Level TTL
For I/O cell
For I/O cell
OPEN DRAIN
Level TTL
Open
Set to "L".
For logic cell
For logic cell
For I/O cell
For I/O cell
Level TTL
For logic cell