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IC502 RH-iX1517GEZZ: RF Signal Processor (IX1517GE) (2/2)
Pin No. Terminal Name Input/Output
50
P1FP
51
LDP1
52
P1DI
53
P1CI
54
P1BI
55
P1AI
56
GNDR
57
LDP2
58
P2AI
59
P2BI
60
P2CI
61
P2DI
62
GNDS
63
P2FP
64
P2FN
P1FN
49
P1FP
50
LDP1
51
P1DI
52
P1CI
53
P1BI
54
P1AI
55
GNDR
56
LDP2
57
P2AI
58
P2BI
59
60
P2CI
61
P2DI
GNDS
62
63
P2FP
64
P2FN
Function
Input
FE+ input
Input
APC polarity 1
Input
D input (DVD)
Input
C input (DVD)
Input
B input (DVD)
Input
A input (DVD)
—
GND terminal (RF)
Input
APC polarity 2
Input
A input (CD)
Input
B input (CD)
Input
C input (CD)
Input
D input (CD)
—
GND terminal (Servo)
Input
FE+ input
Input
FE- input
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
APC1
sel-RF
ADJUSTMENT
sel-PD
F-gain
ADJUSTMENT
F-gain
ADJUSTMENT
sel-PD
sel-PD
T-gain
ADJUSTMENT
APC2
1
2
3
4
5
Figure 47 BLOCK DIAGRAM OF IC
Terminal DC
Voltage (TYP.)
VrA
VrA
VrA
VrA
VrA
VrA
VrA
VrA
VrA
VrA
VrA
R-gain
EQ
RF RIPPLE
GENERATION
sel-IC
sel-FE
FE
GENERATION
sel-TE
sel-DPD
DPDTE
GENERATION
sel-LVL
3BTE
GENERATION
6
7
8
9 10 11 12 13 14 15 16
– 47 –
Remarks
—
Positive polarity when connecting to Vcc
—
—
Positive polarity when connecting to Vcc
—
FE-gain
ADJUSTMENT
TE-gain
ADJUSTMENT
mode-TE
Level
DETECTION
Time
BUS
constant
adjustment
DX-SX1H
32
DPDB
VccR
31
30
NC
29
NC
28
RFO
27
RPP
26
RPB
25
RPO
24
RPZ
23
VccS
22
DFTN
21
FEO
20
TEO
19
LVL
18
LccP
17
VCKF
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