Jtag; Table 3-27 Jtag Chains - GE IMP2B Hardware Reference Manual

3.20 JTAG

The JTAG interface is provided by a Firecron JTS06Bu Scanbridge. This allows the
boundary scan path to be partitioned into smaller chains, providing easier fault
diagnosis and faster Flash programming. The device supports six Test Access Ports,
which are allocated as follows:

Table 3-27 JTAG Chains

TAP Number
1
2
3
4
5
6
The input to the Scanbridge is driven from the CompactPCI JTAG signals as defined
by PICMG2.0, Rev 3.0.
A separate COP header
processor emulation and can be accessed using the IMP2AJTAG test adaptor.
Publication No. IMP2B-0HH/5
Device
Processor (3.3 V to 2.5 V converters on-card)
PMC site
MV64560 Discovery V Host Bridge
Ethernet PHYs
EPLD
Accelerated Flash Programming
NOTE
In PICMG 2.0, Rev 3.0, it is recommended that the Backplane JTAG signals are not used. When no
jumper is fitted across link P4
used for any other purpose allocated to them.
(P38
CAUTION
When using the COP header, ensure that the JTAG Scanbridge is disabled (link
LINK
IMP2AJTAG Manual, publication number
3-4, the IMP2B does not drive these pins and so these signals may be
on the back of the board) is provided to support JTAG
IMP2AJTAG-0HH.
P4 1-2 is not fitted).
Functional Description 39