Usim Card Interface; Overview - Huawei ME909u-521 Hardware Manual

HUAWEI ME909u-521 LTE LGA Module
Hardware Guide

3.7 USIM Card Interface

3.7.1 Overview

The ME909u-521 module provides a USIM card interface complying with the ISO
7816-3 standard and supports both Class B and Class C USIM cards.
Table 3-8 USIM card interface signals
Pin Pin Name
No.
34 USIM_VCC
88 USIM_RESET
89 USIM_DATA
90 USIM_CLK
Issue 05 (2017-12-15)
 Since the USB interface of ME909u-521 module supports USB 2.0 high speed, the
resistance "RV1 and RV2" in the Figure 3-15 must be Voltage Sensitive Resistor with small
capacitance (ALVC18S02003 manufactured by AMOTECH or B72590T7900V60
manufactured by EPCOS is recommended).
 It is recommended that set USB_DM and USB_DP pins as test points and then place these
test points on the DTE for debugging. But layout stub should not be generated.
USB_DM and USB_DP are required to control the differential impedance –90 ohm (± 10%).

The length of the gap between USB_DM and USB_DP should not exceed 5 mil.

 The USB differential signal trace must be as short as possible, and laid out away from
high-speed clock signals and other periodic signals as far as possible.
 Minimize through-holes and turning angles on the USB signal trace to reduce signal
reflection and impedance change.
Do not route the USB signal trace under the following components: crystal, oscillator, clock

circuit, electromagnetic component, and IC that uses or generates clocks.
 Avoid stubs on the USB signal trace because stubs generate reflection and affect the signal
quality.
 Route the USB signal trace on a complete reference plane (GND) and avoid crossing
inter-board gaps because inter-board gaps cause a large reflow channel area and increase
inductance and radiation. In addition, avoid signal traces on different layers.
 The USB signal trace must be far away from core logical components because the high
current pulse generated during the state transitions process of core components may
impose interference on signals.
The USB signal trace must be far away from board edges with a minimum distance of 20 × h

(h indicates the vertical distance between the trace and the reference layer) to avoid signal
radiation.
C1 and C2 are ready for dealing with filter differential mode interference and C5 is ready for

dealing with filter common mode interference. You can choose the value of the C1, C2 and
C5 according to the actual PCB which is integrated 30 mm × 30 mm LGA module
Pad Description
Type
P Output power
supply for USIM
card
O USIM reset
I/O USIM data
O USIM clock
Huawei Proprietary and Confidential
Copyright © Huawei Technologies Co., Ltd.
Description of the Application Interfaces
Parameter Min. Typ.
(V) (V)
- - 1.8/2.85
- - 1.8/2.85
- - 1.8/2.85
- - 1.8/2.85
Max. Comments
(V)
- -
- -
- -
- -
37