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– aa is the SDRAM speed grade
– m is the DIMM type
– E = Unbuffered DIMM (UDIMM), x64 primary + 8 bit ECC module data bus
– L = Load Reduced DIMM (LRDIMM), x64 primary + 8 bit ECC module data bus
– R = Registered DIMM (RDIMM), x64 primary + 8 bit ECC module data bus
– U = Unbuffered DIMM (UDIMM) with no ECC (x64-bit primary data bus)
– cc is the reference design file used for this design
– d is the revision number of the reference design used
– bb is the JEDEC SPD Revision Encoding and Additions level used on this DIMM
The following illustration shows the location of the DIMM connectors on the system board.
Figure 32. The location of the DIMM connectors on the system board
Installation order
Memory modules must be installed in a specific order based on the memory configuration that you
implement on your node.
The following memory configurations are available:
• "Memory mirroring population sequence" on page 47
• "Memory rank sparing population sequence" on page 47
• "Independent memory mode population sequence" on page 46
For information about memory modes, see "Memory configuration" on page 71
Independent memory mode population sequence
Table 11. DIMM installation sequence (Independent mode/normal mode)
Number of DIMM installed
2
4
6
8
46
ThinkSystem SD650 Dual Node DWC Tray and NeXtScale n1200 DWC Enclosure Setup Guide
2 processors installed
Installation sequence (connectors)
4, 12
4, 5, 12, 13
1, 4, 5, 9, 12, 13
1, 4, 5, 8, 9, 12, 13, 16
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