Hitachi HD64411 Q2 User Manual page 10

Quick 2d graphics renderer
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• Display buffer unit
Reads data to be displayed on the CRT from the display-side frame buffer, and outputs the
display data in accordance with the display timing.
• Color palette (6 bits per color, 64 gradation settings)
When using 8 bits/pixel, performs conversion to display data of 256 colors out of 262,144,
based on the color conversion table.
• ∆YUV (YUV): RGB conversion
Converts input data ∆YUV (260,000 colors) or YUV (260,000 colors) to RGB data (60,000
colors), and stores it in the UGM.
• RGB-YCrCb conversion
Converts RGB data (60,000 colors) to YCrCb data (60,000 colors), and outputs the data.
RESET
Rendering unit
Rendering buffer unit
A1–A22
22
D0–D15
16
CONTROL
9
DMA control
CPU interface unit
CLK0
CPG0
CPU data bus
CPU address bus
Memory data bus
Memory address bus
∆YUV → RGB conversion
YUV → RGB conversion
Chip
manager
Figure 1-2
Internal Block Diagram
CLK1
CPG1
Display unit
RGB → YCrCb conversion
Color palette (256 colors)
Display buffer unit
Memory interface unit
DCLK
HSYNC/EXHSYNC
VSYNC/EXVSYNC
DD0–DD17
18
MD0–MD15
16
CONTROL
6
MA0–MA11
12
3

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