Samsung KS57C2308 Manual page 129

KS57C2308/P2308/C2316/P2316
IRET
— Return From Interrupt
IRET
Operation: Operand
Description: IRET is used at the end of an interrupt service routine. It pops the PC values successively from
the stack and restores them to the program counter. The stack pointer is incremented by six and
the PSW, enable memory bank (EMB) bit, and enable register bank (ERB) bit are also
automatically restored to their pre-interrupt values. Program execution continues from the
resulting address, which is generally the instruction immediately after the point at which the
interrupt request was detected. If a lower-level or same-level interrupt was pending when the
IRET was executed, IRET will be executed before the pending interrupt is processed.
Since the "a14" bit of an interrupt return address is not stored in the stack, this bit location is
always interpreted as a logic zero. The starting address in the ROM must for this reason be
located in 0000H–3FFFH.
Operand
Example: The stack pointer contains the value 0FAH. An interrupt is detected in the instruction at location
0122H. RAM locations 0FDH, 0FCH, and 0FAH contain the values 2H, 3H, and 1H, respectively.
The instruction
IRET
leaves the stack pointer with the value 00H and the program returns to continue execution at
location 123H.
During a return from interrupt, data is popped from the stack to the program counter. The data in
stack locations 0FFH–0FAH is organized as follows:
SP
SP + 1 (0FBH)
SP + 2(0FCH)
SP + 3(0FDH)
SP + 4(0FEH)
SP + 5(0FFH)
SP + 6(00H)
– Return from interrupt
– 1 1 0
(0FAH) PC11–PC8
0 0
PC3–PC0
PC7–PC4
IS1 IS0
C SC2
Operation Summary
Binary Code
1 0 1 0
PC13 PC12
EMB ERB
SC1 SC0
SAM47 INSTRUCTION SET
Bytes
1
Operation Notation
1
PC13–8 (SP + 1) (SP)
PC7–0 SP + 2) (SP + 3)
PSW (SP + 4) (SP + 5)
SP SP + 6
Cycles
3
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