Toshiba H1 Series Data Book page 71

32bit micro controller tlcs-900/h1 series
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read interrupt request F/F clear
General-purpose
interrupt
PUSH
processing
PUSH
SR<IFF2:0> ← Level of
INTNEST ← INTNEST + 1
INTNEST ← INTNEST − 1
Interrupt processing
Interrupt specified
YES
by DMA
start vector ?
NO
Interrupt vector calue "V"
PC
SR
accepted
interrupt + 1
PC ← (FFFF00H + V)
Interrupt processing
program
RETI instruction
POP SR
POP PC
End
Figure 3.5.1 Interrupt processing Sequence
92CZ26A-68
Clear interrupt request flag
Start specified
by HDMA
NO
Data transfer by micro
DMA
COUNT ← COUNT − 1
YES
COUNT = 0
NO
TMP92CZ26A
DMA soft start
request
YES
to HDMA processing flow
Micro DMA
processing
Clear vector register
generating micro DMA
transfer end interrupt
(INTTC0)

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