Understanding Rpr; Supervisor Engine Redundancy Overview; Rpr Operation - Cisco WS-SUP32-GE-3B - Supervisor Engine 32 Software Configuration Manual

Understanding RPR

Supervisor Engine Redundancy Overview

When a redundant supervisor engine is in standby mode, the two Gigabit Ethernet interfaces on the
Note
redundant supervisor engine are always active.
Catalyst 6500 series switches support fault resistance by allowing a redundant supervisor engine to take
over if the primary supervisor engine fails. RPR supports a switchover time of 2 or more minutes.
The following events cause a switchover:
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RPR Operation

RPR supports the following features:
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When the switch is powered on, RPR runs between the two supervisor engines. The supervisor engine
that boots first becomes the RPR active supervisor engine. The Multilayer Switch Feature Card and
Policy Feature Card become fully operational. The PISA and PFC3B on the redundant supervisor engine
come out of reset but are not operational.
In a switchover, the redundant supervisor engine become fully operational and the following occurs:
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Note In a switchover, there is a disruption of traffic because some address states are lost and then restored after
they are dynamically redetermined.
Catalyst Supervisor Engine 32 PISA Cisco IOS Software Configuration Guide, Release 12.2ZY
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A hardware failure on the active supervisor engine
Clock synchronization failure between supervisor engines
A manual switchover
Auto-startup and bootvar synchronization between active and redundant supervisor engines
Hardware signals that detect and decide the active or redundant status of supervisor engines
Clock synchronization every 60 seconds from the active to the redundant supervisor engine
A redundant supervisor engine that is booted but not all subsystems are up: if the active supervisor
engine fails, the redundant supervisor engine become fully operational
An operational supervisor engine present in place of the failed unit becomes the redundant
supervisor engine
Support for fast software upgrade (FSU) (See the
page 6-6.)
All switching modules power up again
Remaining subsystems on the PISA (including Layer 2 and Layer 3 protocols) are brought up
Access control lists (ACLs) are reprogrammed into supervisor engine hardware
Chapter 6 Configuring RPR Supervisor Engine Redundancy
"Performing a Fast Software Upgrade" section on
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