Table of Contents
Advertisement
Downloaded from
Elcodis.com
electronic components distributor
16.4 Software Standby Mode
16.4.1 Transition to Software Standby Mode
To enter software standby mode, execute the SLEEP instruction while the SSBY bit is set to 1 in
SYSCR.
In software standby mode, current dissipation is reduced to an extremely low level because the
CPU, clock, and on-chip supporting modules all halt. The on-chip supporting modules are reset.
As long as the specified voltage is supplied, however, CPU register contents and on-chip RAM
data are retained. The settings of the I/O ports are also held.
16.4.2 Exit from Software Standby Mode
Software standby mode can be exited by input of an external interrupt at the NMI, IRQ
pin, or by input at the RES or STBY pin.
IRQ
2
Exit by Interrupt: When an NMI, IRQ
clock oscillator begins operating. After the oscillator settling time selected by bits STS2 to STS0
in SYSCR, stable clock signals are supplied to the entire H8/3032 Series chip, software standby
mode ends, and interrupt exception handling begins. Software standby mode is not exited if the
interrupt enable bits of interrupts IRQ
masked in the CPU.
Exit by RES Input: When the RES input goes low, the clock oscillator starts and clock pulses are
supplied immediately to the entire H8/3032 Series chip. The RES signal must be held low long
enough for the clock oscillator to stabilize. When RES goes high, the CPU starts reset exception
handling.
Exit by STBY Input: Low input at the STBY pin causes a transition to hardware standby mode.
, IRQ
, or IRQ
interrupt request signal is received, the
0
1
2
, IRQ
, and IRQ
are cleared to 0, or if these interrupts are
0
1
2
415
, IRQ
, or
0
1
Advertisement
Table of Contents
