Epson S1C17624 Technical Manual page 156

ClKDiV[3:0]
0xf
0xe
0xd
0xc
0xb
0xa
0x9
0x8
0x7
0x6
0x5
0x4
0x3
0x2
0x1
0x0
D[3:2] ClKSRC[1:0]: Clock Source Select Bits
Selects the count clock source.
When using an external clock as the count clock, supply the clock to the EXCLx pin.
D1 MulTiMD: Multi-Comparator/Capture Mode Select Bit (T16a_ClK0 register)
Sets the T16A2 module to multi-comparator/capture mode.
1 (R/W): Multi-comparator/capture mode
0 (R/W): Normal channel mode (default)
In multi-comparator/capture mode, the clock for Ch.0 configured in the T16A_CLK0 register is sup-
plied to all timer channels. In normal channel mode, different clock configured for each channel indi-
vidually is supplied to the respective counter.
D1 Reserved (T16a_ClK1 register)
D0 ClKen: Count Clock enable Bit
Enables or disables the count clock supply to the counter.
1 (R/W): Enabled (on)
0 (R/W): Disabled (off) (default)
The CLKEN default setting is 0, which disables the clock supply. Setting CLKEN to 1 sends the clock
selected as above to the counter. If timer operation is not required, disable the clock supply to reduce
current consumption.
S1C17624/604/622/602/621 TeChniCal Manual
Table 13. 8.2 Internal Clock Division Ratio Selection
Clock source = iOSC or OSC3
1/16384
1/8192
1/4096
1/2048
1/1024
1/512
Table 13. 8.3 Clock Source Selection
ClKSRC[1:0]
0x3
0x2
0x1
0x0
Seiko epson Corporation
13 16-BiT PWM TiMeRS (T16a2)
Division ratio
Clock source = OSC1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
1/256
1/128
1/64
1/32
1/16
1/8
1/4
1/2
1/1
Clock source
External clock (EXCLx)
OSC3
OSC1
IOSC
(Default: 0x0)
(Default: 0x0)
13-13