R Eceive I Sochronous P Acket H Eader I Ndicate R Egister 3 [B] - Fujitsu MB86617A Specification Sheet

LSI S pecification
7.25. Receive Isochronous Packet Header Indicate Register 3 [B]
Receive Isochronous packet header indicate register 3 [B] is the register that indicates Isochronous packet header information received by
bridge-Bch.
Bit Bit
AD R/W
15 14
48h R - -
Initial Value '0' '0'
BIT Bit Name
15 - 9 reserved
8 - 7 Rx EMI-B
6 Rx o/e-B
5 - 0 Rx SID-B
Rev.1.0
Bit Bit Bit Bit
13 12 11 10
- - -
'0' '0' '0' '0'
Action Value
Read - Always indicate '0'.
Indicate EMI range of receive Isochronous packet header.
Read -
(MSB: bit8, LSB: bit7)
Read - Indicates odd/even range of receive Isochronous packet header.
Indicate SI range of CIP header of receive Isochronous packet.
Read -
(MSB: bit5, LSB: bit0)
Bit Bit Bit Bit
9 8 7 6
Rx
- Rx EMI-B
o/e-B
'0' "00 b" '0'
Function
59
MB86617A
Bit Bit Bit Bit
5 4 3 2
Rx SID-B
"00 h"
Fujitsu VLSI
Bit Bit
1 0