I Nstruction Fetch R Egister - Fujitsu MB86617A Specification Sheet

LSI S pecification
instruction-fetch Register
7.3.
instruction-fetch register is the register that writes in instructions for this LSI, and consists of the instruction code and operand.
Refer to "Chapter 9 Instruction" for each instruction code and operand code.
Bit Bit
AD R/W
15 14
04h R/W
Initial Value
BIT Bit Name
instruction
15 - 8
code
7 - 0 operand
Note) Before writing in instruction for this register, read out IPC busy Bit (bit15) of "7.2. flag & status Register", and confirm that the
IPC busy value is '0'.
Rev.1.0
Bit Bit Bit Bit
13 12 11 10
Instruction code
"00 h"
Action Value
Read/
- Specify each instruction code.
Write
Read/ Specify required operand for each instruction code.
-
Write Write '0' into all bits for instructions without operand.
Bit Bit Bit Bit
9 8 7 6
Function
31
MB86617A
Bit Bit Bit Bit
5 4 3 2
operand
"00 h"
Fujitsu VLSI
Bit Bit
1 0