Cisco 7000 Series Hardware Installation And Maintenance page 139

and
IPs
Installing Configuring
Setting
DCE
All
FSIP The
own
clock
signal
cable
followed
IP
in
7010
interface
clockrate
AZ
Following
1200
38400
148000
2000000
Speeds
the
faster
DTE
do so The
to
cable
The FSIP
Each
dedicated
which
Because
leave
can
configure
operate
amount
ports
Inverting
Systems
Slight variances
clock
inverttransmitc1ock
This prevents
original
inverted
is
7010
interface
invert-transmit-clock
AZ
Cisco
5-18 7010 Hardware
Installation
Clock Rate
the
noninverted
interfaces
require
default
on
an
operation
TxC
and send
signal
DCE When
FSIP
port
to the
and
the
the port
to specify rate
value
the bits-per-second
by
2/0
defined
slot as having
is
configure terminal
serial
2/0
2000000
clockrate
are
acceptable
2400
56000
500000
4000000
above 64kbps
64000
are
work
not
if
speeds might
use the no clockrate
can
you
port automatically recognizes
attached
to the
is again
port
full
support duplex
ports
module see Fast
four-port
MC68040
and
processor
two modules
has can
support
module
each shares
four-port
the other ports
idle to
optimize
each of the four ports
Mbps and
leave the remaining
at
and
of
traffic processed the
actual rates
affect
Clock
the
Signal
use long cables
may
that
cable
in length
temperature
out of
to shift
phase
signals
configuration
of
the
shifting
phase
use the no inverttransmit-clock
phase
for the serial
first
port
terminal
configure
serial
2/0
and Maintenance
transmit clock
internal
FSIP DCE
for the
interface
is
DTE
The
remote remote
it to the
DCE
you must
using interfaces
of the clock with the clockrate
internal
In the following
example
Mbps
clock of
rate
settings
4800 9600
64000 72000
800000
1000000
RS-232
not appropriate
for
cable
too
is long you change
If
your
command
remove
the clock
to
DTE
cable and
the
Mbps
DS-i
at 1.544
operation
FSIP
Interface Processor
Serial
Ti
can
to
up
support or
Ti El
interfaces
to
up or
you can
processor delegate
and bandwidth
on
speed
module
on
to at
operate
The
three ports idle
network
types of external
high error
rates
experience
and network
configuration
the clock
can often correct
Inverting
command
the TxC
inverts
data with clock
the
to
respect
command
In
FSIP
IP
on in
an
slot
which
is
signal generated
DCE
device FSIP
to
generate
DTE
device
returns
the
DCE-mode
connect
command
configuration
on
interface
the serial
first
19200
125000
1300000
RS-449
on
use faster interfaces
from
an
interface
not necessary
rate although
it is
clock
the rate until
ignores
Mbps
and El 2.048
controlled
in Chapter
is
An
El
interfaces
eight-port
bandwidth
to
single
interface For
example
single
Mbps
one
or configure
port
type of
electrical interface
connection devices connected
when
at the
operating higher
the data
can cause
The
this
shift
DCE
clock interfaces
signal for
To change back
clock
the
the the clock
example
that follows
by the
its
clock
adapter
FSIP
an
And
DCE
to
DCE
speeds
by
FSIP
and
port
you
to
the
the
to
speeds
and
to
its