Philips DVDR880/001 Service Manual page 197

Simplified Block Diagram
Ext. Syncs
PIXCLK K
10
RGB /YUV/
YCrCb/D1
2
DADDR
SDA
SDA
SCL
Pin description
VDD33 1
VSS
HSYNCREFI
VSYNCREFI
FIELDIN
B/CbIN0
B/CbIN1
B/CbIN2
B/CbIN3
10
B/CbIN4
B/CbIN5
B/CbIN6
B/CbIN7
B/CbIN8
B/CbIN9
VDD25
VSS
G/YIN0
G/YIN1
G/YIN2 20
G/YIN3
G/YIN4
G/YIN5
G/YIN6
G/YIN7
G/YIN8
G/YIN9
R/CrIN0
R/CrIN1
R/CrIN2 30
R/CrIN3
R/CrIN4
VDD33
VSS
R/CrIN5
R/CrIN6
R/CrIN7
R/CrIN8
R/CrIN9
PIXCLK 40
TEST4
AVDD
AVSS
DADDR1
Circuit-, IC Descriptions and List of Abbreviations
PLL/Clock L k
Generator n
Deinterlacer Core with DCDi™,
Input
Motion Compensation,Film M
Signal Signal
Formatter a
Control o
f n
Interface and
Registers
C
s n i
Mode Detection Mode Detection
and Bad Edit Correction a t
DVDR880-890 /0X1
Sync y
Generator Generator
10 1
,
Output
Signal Signal
Formatter o r
VSS
ADDR4
130 ADDR5
ADDR6
ADDR7
ADDR8
ADDR9
ADDR10
VSS
VDD33
BSEL
CASN
120 RASN
WEN
MEMCLKO
YCLKO
CCLKO
VSS
VDD33
TESTO0
TESTO1
TEST0
110 FILM
TEST1
FSYNC
VDD25
VSS
VDD33
B/CbOUT0
B/CbOUT1
B/CbOUT2
B/CbOUT3
100 B/CbOUT4
B/CbOUT5
B/CbOUT6
B/CbOUT7
VSS
VDD33
B/CbOUT8
B/CbOUT9
H/CSYNCO
VSYNC/CREFO
90 HREFO
VREFO
9. EN 199
c
Sync
Out
YUV/ V
RGB/ R
YCrCb YCrCb