Mitsubishi 32172 User Manual page 851

23
BCLK 0.43VCCE
20
19
Address
(A12-A30)
CS0 , CS1
0.43VCCE
RD
Data Input
(D0-D15)
BLW
BHW
Data output
(D0-D15)
WAIT
Note 1: Stipulated values are guaranteed values when the test pin load capacitance CL
= 15 to 50 pF.
Note 2: Input and output signals are determined high or low with respect to TTL level.
Figure 23.6.7 Read Timing
16
17
tc(BCLK)
td(BCLKH-CS)
23
td(BCLKH-A)
td(BCLKL-RDL)
0.43VCCE
0.16VCCE
40
td(CS-RDL)
39 td(A-RDL)
0.43VCCE
0.16VCCE
55
tw(RDH)
td(BLWH-RDL)
57
td(BHWH-RDL)
0.43VCCE
30 tpxz(BCLKH-DZ)
78
34
33
tsu(WAITL-BCLKH)
0.16VCCE
ELECTRICAL CHARACTERISTICS
18 tw(BCLKL)
tw(BCLKH)
0.16VCCE
22
tv(BCLKH-CS)
21
tv(BCLKH-A)
0.43VCCE
0.16VCCE
41
tv(RDH-A)
tv(RDH-CS)
42
43
tw(RDL)
0.16VCCE
24
tv(BCLKH-RDL)
44
th(RDH-D)
tsu(D-RDH)
45
0.43VCCE
0.43VCCE
0.16VCCE
0.16VCCE
31
th(BCLKH-D)
tsu(D-BCLKH) 32
td(RDH-BLWL)
56
td(RDH-BHWL)
tpzx(RDH-DZ)
46
0.43VCCE
0.16VCCE
79
tsu(WAITH-BCLKH) th(BCLKH-WAITH)
th(BCLKH-WAITL)
0.43VCCE 0.43VCCE
23-21
23.6 AC Characteristics
0.16VCCE
tpzx(BCLKL-DZ)
29
Rev.1.0