Mitsubishi 32172 User Manual page 485

12
SIO47 Interrupt Mask Register (SI47MASK)
D8
T4MASK R4MASK T5MASK R5MASK T6MASK R6MASK T7MASK R7MASK
D Bit Name
8 T4MASK (SIO4 transmit
9 R4MASK (SIO4 receive
10 T5MASK (SIO5 transmit
11 R5MASK (SIO5 receive
12 T6MASK (SIO6 transmit
13 R6MASK (SIO6 receive
14 T7MASK (SIO7 transmit
15 R7MASK (SIO7 receive
This register controls interrupt requests sent from each SIO by enabling or disabling them. An
interrupt request from any SIO is enabled by setting its corresponding interrupt mask bit to 1.
9 10 11
Function
0: Masks (disables) interrupt request
interrupt mask bit) 1: Enables interrupt request
0: Masks (disables) interrupt request
interrupt mask bit) 1: Enables interrupt request
0: Masks (disables) interrupt request
interrupt mask bit) 1: Enables interrupt request
0: Masks (disables) interrupt request
interrupt mask bit) 1: Enables interrupt request
0: Masks (disables) interrupt request
interrupt mask bit) 1: Enables interrupt request
0: Masks (disables) interrupt request
interrupt mask bit) 1: Enables interrupt request
0: Masks (disables) interrupt request
interrupt mask bit) 1: Enables interrupt request
0: Masks (disables) interrupt request
interrupt mask bit) 1: Enables interrupt request
12-15
12.2 Serial I/O Related Registers
<Address: H'0080 0A01>
12 13 14
SERIAL I/O
D15
<When reset: H'00>
R W
Rev.1.0