Mitsubishi 32172 User Manual page 323

10
For interrupts which have two or more interrupt sources for one interrupt vector table, the interrupt
control registers are used to control their interrupt requests and determine interrupt inputs. For this
reason, the status flags in the Interrupt Controller only serve as the bits to determine whether
interrupts are requested from the sources that have been enabled for interrupt and cannot be
accessed for write.
(1) Interrupt request status bit
The status bit is used to determine whether an interrupt is requested. When an interrupt request
occurs, this bit is set in hardware, and cannot be set in software. The status bit is cleared by
writing 0. Writing 1 has no effect, the bit retains its status. Because the status bit is unaffected by
the interrupt mask bit, it can also be used to check operation of the peripheral function. During
interrupt processing, make sure that among the grouped interrupt flags, only the flag which has
had its associated interrupt serviced is cleared.
If any flag for which the interrupt has not been serviced is cleared, unexecuted interrupt requests
are also cleared.
(2) Interrupt mask bit
This flag is used to disable an unnecessary interrupt among the grouped interrupt requests.
Setting this bit to 0 enables the interrupt; setting this bit to 1 disables the interrupt.
Group interrupt
Each timer or TIN input
Data bus
Figure 10.2.5 Interrupt Status Register and Mask Register
interrupt request
Set
Interrupt status
Data=0
clear
F/F
F/F
Interrupt enable
INPUT/OUTPUT TIMERS
10-25
10.2 Common Timer Unit
To the Interrupt
Controller
Rev.1.0