Mitsubishi 32172 User Manual page 462

11
The comparison result is stored in the 10-bit A-D Data Registers (AD0DTn or AD1DTn)
corresponding to the converted channel. Also, the 8 high-order bits of the A-D conversion result can
be obtained by reading the 8-bit A-D Data Registers (AD08DTn or AD18DTn).
The following shows how A-D conversion of the successive approximation method is performed in
each operation mode.
(1) For single mode
The convert operation stops when comparison on the A-D Successive Approximation Register
D15 bit is completed. The content of the A-D Successive Approximation Register (A-D
conversion result) is transferred to the 10-bit A-D Data Registers 0-15 of the converted channel.
(2) For single-shot scan mode
When comparison on the A-D Successive Approximation Register D15 bit for a specified channel
is completed, the content of the A-D Successive Approximation Register is transferred to the
corresponding 10-bit A-D Data Registers 0-15 and the convert operations (b) through (g)
described above are executed for the next channel to be converted.
In single-shot scan mode, convert operation stops when A-D conversion in one specified scan
loop is finished.
(3) For continuous scan mode
When comparison on the A-D Successive Approximation Register D15 bit for a specified channel
is completed, the content of the A-D Successive Approximation Register is transferred to the
corresponding 10-bit A-D Data Registers 0-15 and the convert operations (b) through (g)
described above are executed for the next channel to be converted.
In continuous scan mode, convert operations are executed continuously until scan operation is
forcibly stopped by setting the A-D conversion stop bit (Scan Mode Register 0 D6 bit) to 1.
11.3 Functional Description of the A-D Converters
11-46
A-D CONVERTERS
Rev.1.0