Paragraph
Number
5.5
5.5.1
5.5.2
5.6
5.6.1
5.6.1.1
5.6.1.2
5.6.1.3
5.6.1.4
5.6.2
5.6.2.1
5.6.2.2
5.6.2.3
5.6.2.4
5.7
TABLE OF CONTENTS (Continued)
Page
Title
Number
Interrupt Control.............................................................................
5-4
Interrupt Request (lRO) ... ............................................................
5-5
Interrupt Acknowledge (lACK) ......................................................
5-5
Serial Interface...............................................................................
5-5
Physical Data Request Channel.................................. ...................
5-5
Station Management Request (SMREO)....................................
5-6
Transmit Clock (TXCLK).........................................................
5-6
TXSYM2, TXSYM1, and TXSYMO in MAC Mode .........................
5-6
TXSYM2, TXSYM1, and TXSYMO in Station Management Mode....
5-6
Physical Data Indication Channel............................. .....................
5-7
Station Management Indication (SMIND) ............. ........... ..........
5-7
Receive Clock (RXCLK) ........ ;.................................................
5-7
RXSYMO, RXSYM1, and RXSYM2 in MAC Mode.........................
5-7
RXSYM2, RXSYM1, and RXSYMO in Station Management Mode....
5-8
Signal Summary.............................................................................
5-9
Section 6
Bus Operation
6.1
Host Processor Operation Mode.........................................................
6-1
6.1.1
Host Processor Read Cycles.........................................................
6-1
6.1.2
Host Processor Write Cycles........................................................
6-1
6.1.3
Interrupt Acknowledge Cycles......................................................
6-2
6.2
DMA Operation..............................................................................
6-3
6.2.1
DMA Burst Control....................................................................
6-3
6.2.2
TBC Read Cycles.......................................................................
6-4
6.2.3
TBC Write Cycles.......................................................................
6-4
6.3
Bus Exception Control Functions........................................................
6-4
6.3.1
Normal Termination................. ...... ................. .... ........................
6-6
6.3.2
Halt................ ... . ............. ..... ................. ............. ..... ..... ..........
6-6
6.3.3
Bus Error.................................................................................
6-6
6.3.4
Retry................................ .... ................. ............... ..................
6-6
6.3.5
Relinquish and Retry..................................................................
6-8
6.3.6
Reset..................... ..... .... ...... ...... ............................................
6-8
6.3.7
Undefined BEC Codes ................................................................
6-8
6.4
Bus Arbitration ............. ... .... .... ..... ........... ............ ...........................
6-8
6.4.1
Requesting the Bus .................................................................... 6-10
6.4.2
Receiving the Bus Grant ....... ...... ..................... ....... ..... ........ ....... 6-10
6.4.3
Acknowledgement of Mastership.. .................... ........ .................... 6-10
6.4.4
Bus Arbitration Control............................................................... 6-10
6.4.5
Reset Operation............ ................ ................. ... ... ....... ............. ....... 6-10
6.5
Bus Overhead Time......................................................................... 6-11
6.5.1
Front-End Overhead................................................................... 6-11
6.5.2
Back-End Overhead.................................................................... 6-12
6.6
Registers....................................................................................... 6-12
MC68824 USER'S MANUAL
MOTOROLA
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