Tbc Queues - Motorola MC68824 User Manual

Token-passing bus controller
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II
PRIVATE AREA
TX HOO ACCESS CLASS 6
TX HOO ACCESS CLASS 4
TX HOO ACCESS CLASS 2
TX HOO ACCESS CLASS
a
RX EOO ACCESS CLASS 6
RX EOO ACCESS CLASS 4
RX EOO ACCESS CLASS 2
RX EOO ACCESS CLASS
a
Figure 4-2. TBC Queues
The buffer management structure is powerful and very flexible. The host processor has to maintain
only the free frame descriptor pool and free buffer descriptor pool for receive messages since
the TBC can dynamicaily allocate buffers to the appropriate queue from the free pool. The TBC
data buffer structure easily interfaces to upper layer software. An offset in the data buffer descriptor
indicates how far from the beginning of the data buffer actual data begins. This offset is useful
for building data frames as they are passed down through the seven layers ofthe ISO/OSI structure.
Address and control information can then be appended to and removed from the front of each
frame as it passes through the software layers during transmission and reception respectively.
The TBC can access the first data buffer on an odd byte boundary while transmitting, further
removing restrictions on building frames.
4.1 BUFFER STRUCTURES
The following paragraphs present in detail the TBC's buffer structures which consist of frame
descriptors, buffer descriptors, and data buffers as shown in Figure 4-1.
4.1.1 Frame Descriptors
Frame descriptors (FD) contain MAC frame parameters, frame status, and pointers. Frame de-
scriptors are used for both transmission (TX) and reception (RX) of message frames. The formats
of the frame descriptors for a 48-bit MAC address and for a 16-bit MAC address are shown in
Figure 4-3. Note that a frame descriptor must start at an even address.
MOTOROLA
4-'
MC68824 USER'S MANUAL

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