Yamaha RX-V675 Service Manual page 132

A B C
RX-V675/HTR-6066/RX-A730/TSR-6750
RX-V675/HTR-6066/TSR-6750
DIGITAL 6/8
1
DIGITAL (1)
T 1 0 V 8
L C D C L K L C D D 0
U 8
L C D D 1
R 9 T 8
L C D C T R L 0 L C D D 2
T 9 R 8
L C D C T R L 1 L C D D 3
U 9 V 7
L C D C T R L 2 L C D D 4
V 9 U 7
L C D C T R L 3 L C D D 5
T 7
L C D D 6
A 1 1 R 7
S S M D 0 L C D D 7
B 1 1 V 6
S S M D 1 L C D D 8
C 1 1 U 6
S S M D 2 L C D D 9
D 1 1 T 6
S S M D 3 L C D D 1 0
R 9 5 6 4 E 2 P _ S P I _ N _ C S A 1 2 R 6
+ 3 . 3 N
S S M D 4 L C D D 1 1
1 0 K
B 1 2 V 5
2 S S M D 5 L C D D 1 2
C 1 2 U 5
S S M D 6 L C D D 1 3
D 1 2 T 5
S S M D 7 L C D D 1 4
V 4
L C D D 1 5
C 1 0 U 4
S S M C L K L C D D 1 6
V 3
NETWORK L C D D 1 7
A 1 3
S S M C M D
D 1 0 C 9
MICROPROCESSOR
S S M C P N C
D 9 C 8
S S M W P C N
B 4
N C
No replacement part available.
A 4
N C
B 5
N C
A 5
N C
B 7
3 N C
A 7
N C
I C 9 5 1 B 8
N C
D M 8 6 0 A - A Q E
A 8
Y F 2 4 1 A 0 N C
B 9
N C
A 9
N C
C 7
L 9 5 0 6 B K P 1 0 0 5 H S 6 8 0 - T R R E F
C 9 5 4 2 1 0 0 0 P ( B )
D G N D D G N D F 1 D 6
V S S 1 2 D C O V D D 1 2 D C O C 9 5 0 8 1 0 / 6 . 3
H 1 G 1 V D D 3 3 R T C N R E S 1 2 R E F
C 9 5 4 1 1 0 0 0 P ( B )
V S S 1 2 P L L V D D 1 2 P L L C 9 5 0 7 1 0 / 6 . 3 D G N D D 5
N R E S 3 3 R E F
H 2 H 3
L 9 5 0 7 B K P 1 0 0 5 H S 6 8 0 - T
V S S 1 2 U S B V D D 1 2 U S B C 5
C 9 5 1 9 0 . 1 / 1 0 ( B J )
C 1 D 1 N R E S 1 2 O U T
D G N D
D 4
4
N R E S 3 3 O U T
C 9 5 2 0 0 . 1 / 1 0 ( B J )
V S S V D D 1 2 L V D E 1 D 1 3
C 6 D 8 V S S 3 3 R T C N R E S E T
L 9 5 0 8
D G N D
+ 1 . 2 N
B K P 1 0 0 5 H S 6 8 0 - T F 2
V S S
N 1 3 R T C X I N
V S S
N 1 2
G 2
V S S
N 1 1 R T C X O U T
V S S E 4
N C
N 1 0
C 9 5 7 2
V S S K 3 F 4
D G N D X T A L I N C
N 9
V S S 1 5 P ( C H ) X L 9 5 1 G 4
N C
N 8 4 3
V S S H 4
N 7 N C
V S S 1 2 J 4
N 6 N C
C 9 5 7 3 2 4 M H Z
V S S R 9 6 0 5 J 3
D G N D
M 1 3 X T A L O
V S S 1 5 P ( C H ) 1 . 8 K V 1
M 1 2 N C
R 9 5 7 2
D G N D
V S S
M 1 1 1 0 K
K 2
V S S
M 1 0 V C O 0
J 2
V S S
M 9 V C O 1
5 V S S
M 8
V S S K 1 A 1 0
P D O U T 0 H I G H Z
M 7
R 9 5 4 0 4 7
V S S J 1 B 1 0
P D O U T 1 T E S T 1
M 6
V S S R 9 5 3 9 1 0 K
D G N D
L 1 3
V S S N C P U _ S P I _ R E Q
L 1 2
V S S
L 1 1
V S S
L 1 0
V S S
L 9
V S S
L 8
V S S
L 7
V S S
L 6
V S S
K 1 3
B L M 2 1 P G 6 0 0 S N 1 D
V S S + 1 . 2 N
L 9 5 0 5
K 1 2
V S S
C 9 5 7 8
K 1 1
C 9 5 0 6 1 0 / 6 . 3 0 . 0 1 / 1 6 ( B )
V S S
K 1 0
V S S V D D 1 2
C 9 5 3 7 1 0 0 0 P ( B )
K 9 P 1 3
6
V S S V D D 1 2
K 8 P 1 2
V S S V D D 1 2 C 9 5 1 5 0 . 1 / 1 0 ( B J )
K 7 P 9
V S S V D D 1 2
K 6 I C 9 5 1 P 8
V S S D M 8 6 0 A - A Q E V D D 1 2 C 9 5 3 8 1 0 0 0 P ( B )
J 1 3 N 5
Y F 2 4 1 A 0
V S S V D D 1 2
J 1 2 M 5
V S S V D D 1 2 C 9 5 1 6 0 . 1 / 1 0 ( B J )
J 1 1 L 1 4
V S S V D D 1 2
J 1 0 K 1 4
V S S V D D 1 2
C 9 5 3 9 1 0 0 0 P ( B )
J 9 J 5
V S S V D D 1 2
J 8 H 5
V S S V D D 1 2
C 9 5 1 7 0 . 1 / 1 0 ( B J )
J 7 G 1 4
V S S V D D 1 2
J 6 F 1 4
V S S V D D 1 2 C 9 5 4 0 1 0 0 0 P ( B )
H 1 3 E 1 1
V S S V D D 1 2
H 1 2 E 1 0
V S S V D D 1 2 C 9 5 1 8 0 . 1 / 1 0 ( B J )
H 1 1 E 7 D G N D
V S S V D D 1 2
H 1 0 E 6
V S S 3 3 P L L
L 9 5 1 0 B K P 1 0 0 5 H S 6 8 0 - T
G 3 + 3 . 3 N
7 V S S 3 3 U S B
C 9 5 3 6 1 0 0 0 P ( B )
B 3
V D D 3 3 P L L D G N D
C 9 5 0 5 1 0 / 6 . 3
F 3
C 9 5 3 5 1 0 0 0 P ( B )
V S S 3 3 U S B V D D 3 3 U S B
A 3 B 2 D G N D
C 9 5 0 4 1 0 / 6 . 3
V D D 3 3 U S B
A 2
L 9 5 0 9
+ 3 . 3 N
V S S
B 6 B K P 1 0 0 5 H S 6 8 0 - T
V S S
H 9 C 9 5 1 4 0 . 1 / 1 0 ( B J )
V D D 3 3 D G N D
A 6
V S S V D D 3 3
H 8 D 7
R 9 6 1 3 1 K
V S S V P P + 3 . 3 N
H 7 R 1 0
V S S
H 6
V S S V D D 3 3
C 9 5 3 0 1 0 0 0 P ( B )
G 1 3 P 1 1
V S S V D D 3 3
G 1 2 P 1 0
V S S V D D 3 3 C 9 5 1 0 0 . 1 / 1 0 ( B J )
G 1 1 P 7
V S S V D D 3 3
G 1 0 P 6
8
V S S V D D 3 3 C 9 5 3 1 1 0 0 0 P ( B )
G 9 N 1 4
V S S V D D 3 3
G 8 M 1 4
V S S V D D 3 3 C 9 5 1 1 0 . 1 / 1 0 ( B J )
G 7 L 5
V S S V D D 3 3
G 6 K 5
V S S V D D 3 3
C 9 5 3 2 1 0 0 0 P ( B )
F 1 3 J 1 4
V S S V D D 3 3
F 1 2 H 1 4
V S S V D D 3 3
C 9 5 1 2 0 . 1 / 1 0 ( B J )
F 1 1 G 5
F 5
V S S V D D 3 3
F 1 0
E 1 3
V S S V D D 3 3 C 9 5 3 3 1 0 0 0 P ( B )
F 9
E 1 2
V S S V D D 3 3
F 8
E 9
V S S V D D 3 3 C 9 5 1 3 0 . 1 / 1 0 ( B J )
F 7 E 8
V S S V D D 3 3
F 6 C 9 5 0 3 1 0 / 6 . 3
D G N D
C 9 5 7 9
L 9 5 0 4
+ 3 . 3 N
B K P 1 0 0 5 H S 6 8 0 - T 0 . 0 1 / 1 6 ( B )
No replacement part available.
9
NETWORK
MICROPROCESSOR
10
★ Components having special characteristics are marked
and must be replaced
with parts having specifications equal to those originally installed. COL/CRS_DV
★ Schematic diagram is subject to change without notice.
132
D E F
RX-A730
MICROPROCESSOR
No replacement part available.
R 9 5 2 6
1 0 K X 4
N C P U _ D [ 0 ]
N C P U _ D [ 1 ] 1 0 X 4
N C P U _ D [ 2 ] R 9 5 1 2
N C P U _ D [ 3 ]
N C P U _ D [ 4 ]
N C P U _ D [ 5 ] 1 0 X 4
N C P U _ D [ 6 ] R 9 5 1 3
N C P U _ D [ 7 ]
N C P U _ D [ 8 ]
1 s t M P
N C P U _ D [ 9 ]
R 9 5 1 4
N C P U _ D [ 1 0 ]
C B 9 5 3
A s i d e
1 0 X 4
D G N D N C P U _ D [ 1 1 ]
+ 3 . 3 D
+ 3 . 3 N + 1 . 2 N 1 + 3 . 3 N N C P U _ D [ 1 2 ]
R 9 5 2 3 4 7
N _ R S T D B G _ N _ R S T
2 N C P U _ D [ 1 3 ]
R 9 5 2 2 4 7
D B G _ T X D N C P U _ T X D 1 R 9 5 1 5
3 N C P U _ D [ 1 4 ]
R 9 5 2 1 4 7
D B G _ R X D N C P U _ R X D 1 1 0 X 4
4 N C P U _ D [ 1 5 ]
G N D
5 D G N D
(For factory) D B G _ L E D 0 R 9 5 2 4 4 7 D B G _ L E D 0 R 9 5 3 5 1 0
6 M E M C L K _ L
D B G _ L E D 1 D B G _ L E D 1
7 M E M C L K _ U R 9 5 3 6 1 0
D G N D
0 7 F M N - B M T - A - T F T
R 9 6 2 3 D B G _ N _ R S T
3 K
( 1 % ) + 3 . 3 N
D G N D
+ 3 . 3 N
A s i d e
R 9 6 0 0 1 0 0
N C P U _ R X D 1
R 9 6 0 2
N C P U _ T X D 1
4 . 7 K
+ 3 . 3 N
T o H o s t C P U R 9 5 2 7
( S h t . 0 0 5 )
5 6 7 8
A s i d e
D G N D D G N D N C P U _ S P I _ R D Y
4 3 2 1
1 0 K X 4
N C P U _ S P I _ M O S I
R 9 5 4 1
N C P U _ S P I _ M I S O
4 7
N C P U _ S P I _ S C K
N C P U _ S P I _ N _ C S
A s i d e
N C P U _ N _ R S T
N C P U _ S P I _ R E Q
to DIGITAL 5/8
No replacement part available.
MICROPROCESSOR
+ 1 . 2 N
D G N D
MICROPROCESSOR
No replacement part available.
to DIGITAL 5/8, 8/8
T o H o s t C P U ( S h t . 0 0 5 , 0 0 8 )
N C P U _ V B U S D R V
R 9 6 0 1 4 7
R 9 6 0 3
1 0 0
C 9 5 2 1 C 9 5 2 2
0 . 1 / 1 0 ( B J ) 0 . 1 / 1 0 ( B J )
D G N D D G N D
R 9 6 0 7 D G N D
n o _ u s e
R 9 6 0 6 ( 1 % )
D G N D
2 . 7 K
+ 3 . 3 N
R 9 6 2 2
D G N D
4 . 7 K
S h e e t 6 : N E T
D G N D
I C / C B / X L : 9 5 1 - 9 5 9
O H T E R : 9 5 0 1 - 9 6 9 9
IC955: LAN8700C-AEZG-TR
BD decoder IC
MODE0 18 HP Auto-MDIX
MODE Auto- 10M Tx 10M
28,29
MODE1 17
Control Negotlation
Logic Transmitter
MODE2 16
Transmit Section
Management
nRST
5 SMI
Control 31,32
100M Tx 100M
MII Logic Transmitter
MDIX
23,24,26,27
Control
TXD[0..3]
14
TX_EN 6
PLL
100M Rx DSP System: Analog-to-
TX_ER
13
Logic Clock Digital
TX_CLK 22
Data Recovery
15-18 1
Interrupt
RXD[0..3] Equalizer
Generator
19 PHY
RX_DV
100M PLL
Receive Section
RX_ER 21 Address
RX_CLK 20 Latches
9
10M Rx Squelch and
LED
CRS 3 10 LINK
Logic Filters
Circuitry
36 11 ACTIVITY
12 FDUPLEX
MDC 2
10M PLL
Central
MDIO 4
Blas
G H
NETWORK
N O R F L A S H 2 5 6 M b i t
NOR FLASH
P 1 5
F D 0
P 1 6 A 1 7 N C P U _ A [ 0 ]
F D 1 A 0
R 1 5 A 1 8 N C P U _ A [ 1 ] R 9 5 6 2 1 0 K
F D 2 A 1
R 1 6 B 1 8 R 9 5 0 6 N C P U _ A [ 2 ] R 9 5 6 3 1 0 K
F D 3 A 2
N C P U _ A [ 1 6 ]
R 1 7 C 1 6 2 2 X 4 N C P U _ A [ 3 ]
F D 4 A 3
N C P U _ A [ 4 ] N C P U _ A [ 2 3 ] A 2 3
T 1 5 C 1 7
F D 5 A 4
T 1 6 C 1 8 N C P U _ A [ 5 ] N C P U _ A [ 2 2 ] A 2 2
F D 6 A 5
R 9 5 0 7
T 1 7 D 1 6 N C P U _ A [ 6 ] N C P U _ A [ 1 5 ] A 1 5
F D 7 A 6
2 2 X 4
V 1 8 D 1 7 N C P U _ A [ 7 ] N C P U _ A [ 1 4 ] A 1 4
F A L E A 7
U 1 6 D 1 8 N C P U _ A [ 8 ] N C P U _ A [ 1 3 ] A 1 3
F C L E A 8
U 1 5 E 1 5 N C P U _ A [ 9 ] N C P U _ A [ 1 2 ] A 1 2
N F C E 0 A 9
R 9 5 0 8
U 1 8 E 1 6 N C P U _ A [ 1 0 ] N C P U _ A [ 1 1 ] A 1 1
N F R B A 1 0
V 1 7 E 1 7 2 2 X 4 N C P U _ A [ 1 1 ] N C P U _ A [ 1 0 ] A 1 0
N F R E A 1 1
U 1 7 E 1 8 N C P U _ A [ 1 2 ] N C P U _ A [ 9 ] A 9
N F W E A 1 2
V 1 6 F 1 5 N C P U _ A [ 1 3 ] N C P U _ A [ 8 ] A 8
N F W P A 1 3 / R A S
R 9 5 0 9
F 1 6 N C P U _ A [ 1 4 ] N C P U _ A [ 1 9 ] A 1 9
A 1 4 / C A S
2 2 X 4
L 1 8 F 1 7 N C P U _ A [ 1 5 ] N C P U _ A [ 2 0 ] A 2 0
D 0 A 1 5 / B A 0
L 1 7 F 1 8 N C P U _ A [ 1 6 ] N C P U _ N _ W E W E #
D 1 A 1 6 / B A 1
L 1 6 G 1 5 N C P U _ A [ 1 7 ] R E S E T #
R 9 5 6 6
D 2 A 1 7 / D Q M 0
R 9 5 1 0
L 1 5 G 1 6 N C P U _ A [ 1 8 ] N C P U _ A [ 2 1 ] n o _ u s e A 2 1
D 3 A 1 8 / D Q M 1
2 2 X 4
M 1 8 G 1 7 N C P U _ A [ 1 9 ] R 9 5 6 7 W P # / A C C
+ 3 . 3 N
D 4 A 1 9
n o _ u s e
M 1 7 G 1 8 N C P U _ A [ 2 0 ] R Y / B Y #
I C 9 5 1
D 5 A 2 0
M 1 6 D M 8 6 0 A - A Q E H 1 5 N C P U _ A [ 2 1 ] D G N D N C P U _ A [ 1 8 ] A 1 8
D 6 Y F 2 4 1 A 0 A 2 1
M 1 5 H 1 6 R 9 5 1 1 N C P U _ A [ 2 2 ] N C P U _ A [ 1 7 ] A 1 7
D 7 A 2 2
N 1 8 H 1 7 2 2 X 4 N C P U _ A [ 2 3 ] N C P U _ A [ 7 ] A 7
D 8 A 2 3
N 1 7 N C P U _ A [ 6 ] A 6
D 9
N 1 6 N C P U _ A [ 5 ] A 5
D 1 0
N 1 5 N C P U _ A [ 4 ] A 4
D 1 1
P 1 8 N C P U _ A [ 3 ] A 3
R 9 5 1 6 1 0 K X 4
D 1 2
2 2 X 4 R 9 5 2 9
P 1 7 J 1 5 N C P U _ N _ C S 0 N C P U _ A [ 2 ] A 2
D 1 3 N C S 0
R 1 8 J 1 6 N C P U _ N _ C S 1 N C P U _ A [ 1 ] A 1
D 1 4 N C S 1 + 3 . 3 N
T 1 8 J 1 7 N C P U _ S P I _ R D Y N C
D 1 5 N C S 2
H 1 8 N C
N C S 3 D G N D
2 2 X 4
K 1 7 R 9 5 3 0
N O E + 3 . 3 N S O C K E T : W N 2 4 4 1 0
K 1 5 K 1 6 N C P U _ N _ W E
M E M C L K N W E
J 1 8 K 1 8 N C P U _ N _ O E
M E M C K E N W A I T
M E M C K E
R 9 5 1 7 1 0 K X 4
N C P U _ S P I _ R D Y
N 3
A V 0 D A T A 0
B 1 4 N 2
R X D 0 A V 0 D A T A 1
C 1 3 N 1
T X D 0 A V 0 D A T A 2
A 1 4 M 4
R X D 1 A V 0 D A T A 3
B 1 3 L 1
T X D 1 A V 0 C L K
M 1
A V 0 C T R L 0
A 1 5 M 2
T D O A V 0 C T R L 1
C 1 4 M 3
T C K A V 0 C T R L 2
I C 9 5 1
B 1 5
T M S D M 8 6 0 A - A Q E
A 1 6 Y F 2 4 1 A 0 P 3
T D I A V 1 D A T A 0
P 2
A V 1 D A T A 1
D 1 4 P 1
S P I D I N A V 1 D A T A 2
D 1 5 N 4
S P I D O U T A V 1 D A T A 3
B 1 6 T o H o s t C P U ( S h t . 0 0 5 )
N C P U _ A M U T E
S P I C L K
C 1 5 U 1 to DIGITAL 5/8
S P I N C S 0 A V 2 D A T A 0
B 1 7 T 2
S P I N C S 1 A V 2 D A T A 1
A s i d e
R 3
A V 2 D A T A 2
R 9 5 1 8
P 4 N C P U _ S D O
A V 2 D A T A 3 N C P U _ S D O
4 7 X 4
K 4 R 1 N C P U _ W C K
N C P U _ W C K
A O U T L P A V 2 C L K T o D I R , N E T _ D A C
L 2 T 1 N C P U _ B C K
N C P U _ B C K ( S h t . 0 0 7 , 0 0 8 )
A O U T L N A V 2 C T R L 0
R 9 5 3 8
L 4 R 2 N C P U _ M C K
N C P U _ M C K to DIGITAL 7/8, 8/8
A O U T R P A V 2 C T R L 1
0
L 3
A O U T R N N C P U _ M C K : 2 4 . 5 7 6 M H z
T 4
g u a r d l i n g w i t h D G N D R 9 5 8 1
A V 3 D A T A 0
R 5
1 0
A V 3 D A T A 1
I C 9 5 6
V 2 R 4 R 9 5 8 2
A V 4 D A T A 0 A V 3 C L K M F I 3 3 7 S 3 9 5 9
n o _ u s e
U 3 U 2 A s i d e G N D V C C
A V 4 D A T A 1 A V 3 C T R L 0
R 9 5 1 9 R 9 5 8 3
T 3 S D A R S T
A V 3 C T R L 1
n o _ u s e
4 7 X 4
N C S C L
N C N C
0 . 1 / 1 0 ( B J )
D G N D
NETWORK
T o D I R
N C P U _ S P D I F
( S h t . 0 0 7 )
to DIGITAL 7/8
NETWORK
C 9 5 6 3 4 . 7 / 6 . 3 L 9 5 1 1
B K P 1 0 0 5 H S 6 8 0 - T
C 9 5 4 8 0 . 0 1 / 1 6 ( B )
D G N D
C 9 5 4 9 0 . 0 1 / 1 6 ( B )
C 9 5 6 4 4 . 7 / 6 . 3
1 0 K X 4 + 3 . 3 N
B 1 U 1 2 R 9 5 3 3
U S B D + M I I R X D 0 D G N D
A 1 V 1 2 1 0 K X 4
U S B D - M I I R X D 1
9
U 1 3 L I N K / P H Y A D 1
M I I R X D 2
1 0
E 3 V 1 3 A C T I V I T Y / P H Y A D 2
U S B V B U S D R V M I I R X D 3 + 3 . 3 N
1 1
R 9 5 3 2 F D U P L E X / P H Y A D 3
D G N D
1 2
D 2 T 1 2 X T A L 2
U S B V B U S M I I R X C L K 1 3
T 1 4 R M I I _ R X D V C L K I N / X T A L 1
M I I R X D V 1 4
R 1 3 R M I I _ R X E R R X D 3 / n I N T S E L
M I I R X E R 1 5
R X D 2 / M O D E 2
R 9 5 3 1 1 6
U 1 0 R M I I _ R X D [ 3 ] R M I I _ R X D [ 3 ] R X D 1 / M O D E 1
M I I T X D 0 1 7
V 1 0 R M I I _ R X D [ 2 ] R M I I _ R X D [ 2 ] R X D 0 / M O D E 0
M I I T X D 1
1 8
U 1 1 R M I I _ T X D [ 2 ] 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7
M I I T X D 2
E 2 V 1 1 R M I I _ T X D [ 3 ]
U S B I D M I I T X D 3
I C 9 5 1
ETHERNET
4 7 X 4
D M 8 6 0 A - A Q E
C 2 Y F 2 4 1 A 0 R 1 2
U S B R E X T M I I T X C L K
PHY
R 1 1 R M I I _ T X E N
M I I T X E N
D 3 T 1 1
U S B A T S T M I I T X E R
C 4 T 1 3
U S B X T A L I M I I C O L
R 1 4 R 9 6 2 1 1 0 K
M I I C R S D G N D
C 3
U S B X T A L O
+ 3 . 3 N
R 9 6 0 8 1 . 5 K
V 1 4 R M I I _ M D C
M I I M D C
R 9 6 0 9 1 . 5 K
U 1 4 R M I I _ M D I O
M I I D I O
V 1 5 R 9 6 2 0 3 3 R M I I _ C L K
M I I P H Y C L K
R M I I _ C L K = 5 0 M H z
g u a r d l i n g w i t h D G N D
L 9 5 0 1
n o _ u s e 2
1
C 9 5 4 6
E X C 2 4 C E 9 0 0 U
D i f f e r e n t i a l I m p e d a n c e 9 0 o h m
A V R L 1 6 1 A 1 R 1 N T B A V R L 1 6 1 A 1 R 1 N T B
TXP/TXN
D G N D
RXP/RXN
XTAL1
XTAL2
CAPACITOR
nINT
REMARKS PARTS NAME
RESISTOR NO MARK ELECTROLYTIC CAPACITOR
REMARKS PARTS NAME TANTALUM CAPACITOR
PHYAD[0..4] NO MARK CARBON FILM RESISTOR (P=5) NO MARK CERAMIC CAPACITOR
CARBON FILM RESISTOR (P=10) CERAMIC TUBULAR CAPACITOR
METAL OXIDE FILM RESISTOR POLYESTER FILM CAPACITOR
SPEED100
METAL FILM RESISTOR POLYSTYRENE FILM CAPACITOR
METAL PLATE RESISTOR MICA CAPACITOR
FIRE PROOF CARBON FILM RESISTOR P POLYPROPYLENE FILM CAPACITOR
CEMENT MOLDED RESISTOR SEMICONDUCTIVE CERAMIC CAPACITOR
SEMI VARIABLE RESISTOR POLYPHENYLENE SULFIDE FILM
S
CHIP RESISTOR CAPACITOR
I J K
Y F 2 5 4 A 0 W r i t t e n b y Y E M S D R A M 2 5 6 M b i t
Y C 2 0 1 B 0 M X 2 9 G L 2 5 6 F L T 2 I - 9 0 Q
Y A 1 8 0 B 0 S 2 9 G L 2 5 6 S 9 0 T F I 0 2 0
W N 2 4 4 1 0 I C S O C K E T Y F 2 8 2 A 0 A 3 V 5 6 S 3 0 F T P - G 6 ( Z E N T E L )
D G N D
C 9 5 2 6
0 . 1 / 1 0 ( B J )
N C ( A 2 4 ) J 9 5 0 5 V D D V S S
D G N D + 3 . 3 R A M
n o _ u s e
J 9 5 0 4
N C ( A 2 5 ) N C P U _ D [ 9 ] D Q 0 D Q 7
n o _ u s e
A 1 6 N C P U _ A [ 1 6 ] C 9 5 5 6 V D D Q V S S Q
+ 3 . 3 R A M
R 9 5 6 9 0 . 0 1 / 1 6 ( B )
B Y T E # N C N C
+ 3 . 3 N
4 . 7 K
V S S N C P U _ D [ 1 1 ] D Q 1 D Q 6
D G N D
D Q 1 5 N C P U _ D [ 1 5 ]
D G N D V S S Q V D D Q
D Q 7 N C P U _ D [ 7 ]
N C N C
D Q 1 4 N C P U _ D [ 1 4 ] N C P U _ D [ 1 3 ]
D Q 2 D Q 5
D Q 6 N C P U _ D [ 6 ] C 9 5 7 0
V D D Q V S S Q
+ 3 . 3 R A M
D Q 1 3 N C P U _ D [ 1 3 ] 1 / 6 . 3
N C N C
D Q 5 N C P U _ D [ 5 ] N C P U _ D [ 1 5 ] D Q 3 D Q 4
D Q 1 2 N C P U _ D [ 1 2 ] V S S Q V D D Q
D G N D
D Q 4 N C P U _ D [ 4 ] N C N C
N C P U _ D 0 - 1 5 ]
0 . 1 / 1 0 ( B J )
V C C 0 . 1 / 1 0 ( B J )
+ 3 . 3 N S t t u b m u s t b e + 3 . 3 R A M V D D V S S
C 9 5 2 3 C 9 5 2 7
D Q 1 1 N C P U _ D [ 1 1 ] w i t h i n 5 m m
N C N C
D Q 3 N C P U _ D [ 3 ] N C P U _ N _ W E
W E D Q M
D Q 1 0 N C P U _ D [ 1 0 ] N C P U _ A [ 1 4 ]
C A S C L K
D Q 2 N C P U _ D [ 2 ] N C P U _ A [ 1 3 ]
R A S C K E
D Q 9 N C P U _ D [ 9 ] N C P U _ N _ C S 1
C S A 1 2
D Q 1 N C P U _ D [ 1 ] N C P U _ A [ 1 5 ]
B A 0 A 1 1
D Q 8 N C P U _ D [ 8 ] N C P U _ A [ 1 6 ] B A 1 A 9
D Q 0 N C P U _ D [ 0 ] N C P U _ A [ 1 0 ] A 1 0 / A P A 8
O E # N C P U _ N _ O E N C P U _ A [ 0 ] A 0 A 7
+ 3 . 3 N + 3 . 3 R A M
V S S N C P U _ A [ 1 ]
D G N D A 1 A 6
C E # N C P U _ N _ C S 0 n o _ u s e N C P U _ A [ 2 ]
A 2 A 5
R 9 5 2 0
A 0 N C P U _ A [ 0 ] N C P U _ A [ 3 ]
A 3 A 4
0
N C
V D D V S S
+ 3 . 3 R A M
V I O 0 . 1 / 1 0 ( B J )
C 9 5 2 8
+ 3 . 3 N
C 9 5 2 4 SDRAM
0 . 1 / 1 0 ( B J )
D G N D D G N D
No replacement part available.
S D R A M 2 5 6 M b i t
C 9 5 8 5
0 . 1 / 1 0 ( B J )
V D D V S S
+ 3 . 3 R A M
N C P U _ D [ 0 ] D Q 0 D Q 7
C 9 5 8 8 V D D Q V S S Q
+ 3 . 3 R A M
0 . 0 1 / 1 6 ( B ) N C N C
N C P U _ D [ 2 ] D Q 1 D Q 6
V S S Q V D D Q
D G N D
N C N C
N C P U _ D [ 4 ] D Q 2 D Q 5
C 9 5 8 6 V D D Q V S S Q
+ 3 . 3 R A M
1 / 6 . 3
N C N C
N C P U _ D [ 6 ]
D Q 3 D Q 4
D G N D V S S Q V D D Q
N C N C
0 . 1 / 1 0 ( B J )
V D D V S S
+ 3 . 3 R A M
C 9 5 9 0
N C N C
N C P U _ N _ W E
W E D Q M
N C P U _ A [ 1 4 ] C A S C L K
N C P U _ A [ 1 3 ] R A S C K E
N C P U _ N _ C S 1 C S A 1 2
N C P U _ A [ 1 5 ]
B A 0 A 1 1
iPod
+ 3 . 3 N N C P U _ A [ 1 6 ]
B A 1 A 9
N C P U _ A [ 1 0 ]
A 1 0 / A P A 8
AUTHENTICATION
N C P U _ A [ 0 ]
A 0 A 7
N C P U _ A [ 1 ]
A 1 A 6
A p p l e C o P r o c e s s o r N C P U _ A [ 2 ]
A 2 A 5
N C P U _ A [ 3 ]
( M F I 3 3 7 S 3 9 5 9 ( Y E 9 1 3 A 0 ) ) A 3 A 4
I 2 C A d d r = 2 0 h / 2 1 h ( S E L A = L o w ) V D D V S S
+ 3 . 3 R A M
C 9 5 9 1
No replacement part available.
SDRAM 0 . 1 / 1 0 ( B J )
No replacement part available.
R 9 6 1 9
+ 3 . 3 N
D G N D
1 0 K
R 9 5 0 1 - R 9 5 0 4 : W Z 7 4 8 9 0 , Z C 6 2 3 5 0
+ 3 . 3 N
R 9 5 0 5 : W Z 7 4 9 0 0 , Z C 6 2 3 6 0
L 9 5 1 3
B K P 1 0 0 5 H S 6 8 0 - T
E T H _ G N D
D G N D D G N D
C 9 5 6 6 4 . 7 / 6 . 3
D G N D L 9 5 0 2 1
1 4
2
8 7 6 5 4 3 2 1
2 3
3 6 3
C D D A 3 . 3 C 9 5 5 3 0 . 0 1 / 1 6 ( B ) E X C 2 4 C E 9 0 0 U
3 5 7
R 9 6 1 0 1 2 . 4 K
E X R E S 1
D G N D
3 4 8
G V D D A 3 . 3 C 9 5 5 2 0 . 0 1 / 1 6 ( B )
3 3 L 9 5 0 3 4
n o _ u s e
R X P 1 4
I C 9 5 5 5
D G N D 3 2 R 9 6 1 1
R X N 2 3
L A N 8 7 0 0 C - A E Z G - T 6
3 1
V D D A 3 . 3 C 9 5 5 1 0 . 0 1 / 1 6 ( B )
E X C 2 4 C E 9 0 0 U E T H _ G N D
Y C 5 4 3 B 0
3 0
T X P D G N D
2 9
T X N
2 8
No replacement part available.
D G N D
D G N D
C 9 5 5 0 0 . 0 1 / 1 6 ( B )
C 9 5 6 5 4 . 7 / 6 . 3
D G N D
L 9 5 1 2 D i f f e r e n t i a l I m p e d a n c e 1 0 0 o h m
B K P 1 0 0 5 H S 6 8 0 - T
IC953: MX29GL256FLT2I-90Q
Signal voltage 3 V only flash memory
C B 9 5 2
V B U S Page 135 M7
1
3 D -
2
to OPERATION (1)_W3010
U S B
4 D + CE#
3
(RX-V675/HTR-6066/TSR-6750)
C 9 5 2 9 OE#
G N D
D G N D 4 WE#
n o _ u s e
F G RESET#
5
Page 138 K9 BYTE#
P H I WP#/ACC
J 9 5 0 1
C 9 5 4 5 V B 3 9 0 1 0
n o _ u s e
1 0 0 0 P ( B ) to OPERATION (12)_W3009
(RX-A730)
D G N D
A0-AM
NOTICE
(model)
J JAPAN
U U.S.A
C CANADA
R GENERAL
T CHINA
K KOREA
A AUSTRALIA
B BRITISH
G EUROPE
L SINGAPORE
E SOUTH EUROPE
V TAIWAN
F RUSSIAN
P LATIN AMERICA
S BRAZIL
H THAI
L M N
IC952, 954: A3V56S30FTP-G6
256 Mb synchronous DRAM
DQ0-7
2,4,5,7,8,10,11,13
A - S i d e
I/O Buffer
D G N D
N C P U _ D [ 8 ] Memory Array Memory Array Memory Array Memory Array
8192x1024x8 8192x1024x8 8192x1024x8 8192x1024x8
D G N D Cell Array Cell Array Cell Array Cell Array
Bank #0 Bank #1 Bank #2 Bank #3
N C P U _ D [ 1 0 ]
1 / 6 . 3
+ 3 . 3 R A M
C 9 5 7 1
Mode
Register
N C P U _ D [ 1 2 ]
Control Circuitry
D G N D
Address Buffer Control Signal Buffer
N C P U _ D [ 1 4 ]
0 . 0 1 / 1 6 ( B )
+ 3 . 3 R A M
C 9 5 5 7 Clock Buffer
22-26,29-36 20,21
38 37 19 18 17 16 39
D G N D
A0-12 BA0,1 CLK CKE /CS /RAS /CAS /WE DQM
N C P U _ A [ 1 8 ]
M E M C L K _ U
M E M C L K : 1 6 0 M H z
M E M C K E
N C P U _ A [ 1 2 ]
N C P U _ A [ 1 1 ]
N C P U _ A [ 9 ]
N C P U _ A [ 8 ]
N C P U _ A [ 7 ]
N C P U _ A [ 6 ]
N C P U _ A [ 5 ]
N C P U _ A [ 4 ]
D G N D
g u a r d l i n g
w i t h D G N D
B - S i d e
D G N D
N C P U _ D [ 1 ]
D G N D
N C P U _ D [ 3 ]
1 / 6 . 3
+ 3 . 3 R A M
C 9 5 8 7
N C P U _ D [ 5 ]
D G N D
N C P U _ D [ 7 ]
0 . 0 1 / 1 6 ( B )
+ 3 . 3 R A M
C 9 5 8 9
D G N D
N C P U _ A [ 1 7 ]
M E M C L K : 1 6 0 M H z IC951: DM860A-AQE
M E M C L K _ L
Network microprocessor
M E M C K E
N C P U _ A [ 1 2 ]
N C P U _ A [ 1 1 ]
N C P U _ A [ 9 ]
General Purpose
N C P U _ A [ 8 ] Security Engine Timing Engine
RESET, BOOT_SEL on-chip RAM CLOCKS
Reset, Boot, OTP 2 PLLs, 3 DCOs
N C P U _ A [ 7 ] 64 kBytes
N C P U _ A [ 6 ]
N C P U _ A [ 5 ] master
DMA
AV0 Port slave
N C P U _ A [ 4 ] 4xAudio, 1xVideo 2 Forwarding Units
2 8
I S, I S, DSD, video 64 Contexts
D G N D
AV2 Port S
ARM 926EJ-S
4xAudio
2 8
I S, I S, DSD 240 MHz
Y
I-cache 16 kByte
slave master
AV3 Port
S D-cache 16 kByte
2xAudio 2 8
I S, I S, DSD,
SPDIF
T
slave
Interrupt Controller
AV4 Port Watchdog, 2 Timer
E
2xAudio I 2 S, I 8 S, DSD,
SPDIF, ADAT
M RTSP Processor
160 MHz
stereo
master
Audio
PWM-DAC slave I-cache 16 kByte
TCM 48 kByte
slave
Memory Bus, SD/SRAM and System
System Extension
Extension Controller Audio Engine
B
160 MHz
master
slave I-cache 4 kByte
J 9 5 0 3 slave
LCD LCD Controller U
TCM 10 kByte
n o _ u s e
S
C 9 5 7 7
0 . 0 1 / 1 6 ( B ) D G N D
USB 2.0 slave master Ethernet MAC
USB (R/SSS)MII
USB OTG
10/100 Mbps
PHY 8 kByte RAM
slave slave
UART 2 x UART-1 NAND FLASH NAND
C B 9 5 1
slave slave
SPI SPI SSM Controller
T X +
T X -
R X +
E t h e r n e t
R X - NETWORK
(NET)
L U 1 T 0 4 1 A - L F
W H 2 3 7 3 0
J 9 5 0 2
n o _ u s e
C 9 5 7 5
D G N D
0 . 0 1 / 1 6 ( B )
WRITE
CONTROL
PROGRAM/ERASE
STATE
INPUT
HIGH VOLTAGE MACHINE
LOGIC
(WSM)
STATE
A23 1 56 NC
ADDRESS FLASH REGISTER A22 2 55 NC
A15 3 54 A16
ARRAY
LATCH
A14 4 53 BYTE#
ARRAY
A13 5 52 GND
AND
SOURCE A12 6 51 Q15/A-1
HV
BUFFER A11 7 50 Q7
Y-PASS GATE
COMMAND A10 8 49 Q14
DATA A9 9 48 Q6
A8 10 47 Q13
DECODER
A19 11 46 Q5
A20 12 45 Q12
WE# 13 44 Q4
SENSE PGM
RESET# 14 43 VCC
AMPLIFIER DATA
HV A21 15 42 Q11
COMMAND WP#/ACC 16 41 Q3
RY/BY# 17 40 Q10
DATA LATCH
A18 18 39 Q2
PROGRAM A17 19 38 Q9
DATA LATCH A7 20 37 Q1
A6 21 36 Q8
A5 22 35 Q0
A4 23 34 OE#
A3 24 33 GND
Q0-Q15/A-1 I/O BUFFER
A2 25 32 CE#
A1 26 31 A0
NC 27 30 NC
AM: MSB address
NC 28 29 VI/O
GPIO
SSM