Table of Contents
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A
B
C
RX-V675/HTR-6066/TSR-6750
DIGITAL 3/8
1
t o 0 0 1 . s h t
H R X _ C L K , H R X _ D [ 0 - 4 7 ] , H R X _ D E , H R X _ H S , H R X _ V S
( H D M I R x )
to DIGITAL 1/8
t o 0 0 2 . s h t
V D E C _ C L K , V D E C _ Y [ 9 - 0 ] , V D E C _ C [ 9 - 0 ] , V D E C _ D E , V D E C _ H S , V D E C _ V S
( V D e c )
to DIGITAL 2/8
D [ 0 - 1 5 ]
A [ 0 - 2 2 ]
t o 0 0 5 . s h t
M C B U S _ N _ R D
( u - C o m )
M C B U S _ N _ W R _ F P
to DIGITAL 5/8
F P G A _ N _ C S
2
C B 5 1
n o _ u s e
1
2
3
4
5
6
7
8
9
1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8
+ 3 . 3 F P G
V +
5
3
V -
D G N D
+ 3 . 3 H
I C 5 2
D G N D
n o _ u s e
2
3
F P G A _ S C K
4
1
1 0
J 5 0 0
R 5 0 0
F P G A _ M O S I
0
0
J 5 0 1
F P G A _ N _ C F G
0
t o 0 0 5 . s h t
J 5 0 3
( u - C o m )
F P G A _ C D O N E
to DIGITAL 5/8
F P G A _ N _ S T A
C 5 6 8
4
1 0 0 0 P ( B )
1
O E
V D D
T P 5 0 1
X L 5 1
2 G N D
O U T
2 7 M H Z
W K 8 4 1 2 0 /
D G N D
W U 0 6 6 7 0
+ 3 . 3 F P G
L 5 0 1
B K P 1 0 0 5 H S 6 8 0 - T
D 4
+ 3 . 3 H
V C C I O 1
F 4
V C C I O 1
I C 5 0
H 4
V C C I O 1
K 4
E P 4 C E 1 5 F 2 3 C 6 N
D G N D
V C C I O 1
N 4
V C C I O 2
Y D 9 1 7 A 0
5
R 4
V C C I O 2
U 4
V C C I O 2
W 4
FPGA
D G N D
V C C I O 2
A A 6
V C C I O 3
A B 2
V C C I O 3
W 1 1
V C C I O 3
W 5
V C C I O 3
D G N D
W 9
V C C I O 3
A B 2 1
V C C I O 4
W 1 2
V C C I O 4
W 1 6
V C C I O 4
W 1 8
V C C I O 4
+ 3 . 0 F P G
D G N D
Y 1 4
L 5 0 0
V C C I O 4
B K P 1 0 0 5 H S 6 8 0 - T
P 1 8
+ 3 . 0 F P G A
V C C I O 5
T 1 9
V C C I O 5
6
V 1 9
V C C I O 5
Y 1 9
V C C I O 5
D G N D
E 1 9
V C C I O 6
G 1 9
V C C I O 6
J 2 0
V C C I O 6
L 1 9
V C C I O 6
D G N D
A 2 1
V C C I O 7
D 1 2
V C C I O 7
D 1 4
V C C I O 7
D 1 6
D G N D
V C C I O 7
D 1 8
V C C I O 7
A 2
+ 3 . 3 F P G
V C C I O 8
D 1 1
V C C I O 8
D 5
V C C I O 8
D 9
V C C I O 8
D G N D
E 8
7
L 5 0 2
V C C I O 8
B L M 2 1 P G 6 0 0 S N 1 D
J 1 0
+ 1 . 2 D H
V C C I N T
J 1 1
V C C I N T
J 1 2
V C C I N T
J 1 3
V C C I N T
D G N D
J 1 4
V C C I N T
J 8
V C C I N T
K 1 4
V C C I N T
K 9
V C C I N T
L 1 4
V C C I N T
L 9
V C C I N T
D G N D
M 1 4
V C C I N T
M 9
V C C I N T
N 9
V C C I N T
P 1 0
V C C I N T
P 1 1
8
V C C I N T
P 1 2
V C C I N T
P 1 3
V C C I N T
D G N D
P 9
V C C I N T
T 1 3
V C C I N T
U 1 6
V C C I N T
U 1 7
L 5 1 2
D G N D
V C C I N T
B K P 1 0 0 5 H S 6 8 0 - T
U 6
+ 1 . 2 F P L L
V C C D _ P L L 1
E 1 7
V C C D _ P L L 2
F 6
V C C D _ P L L 3
V 1 7
+ 2 . 5 F P G
V C C D _ P L L 4
D G N D
T 6
L 5 0 3
V C C A 1
B K P 1 0 0 5 H S 6 8 0 - T
F 1 8
+ 2 . 5 F P G A
V C C A 2
G 6
V C C A 3
U 1 8
V C C A 4
9
D G N D
No replacement part available.
RESISTOR
REMARKS
PARTS
NAME
NO MARK
CARBON
FILM
RESISTOR
(P=5)
CARBON
FILM
RESISTOR
(P=10)
METAL
OXIDE
FILM
RESISTOR
METAL
FILM
RESISTOR
METAL
PLATE
RESISTOR
FIRE
PROOF
CARBON
FILM
RESISTOR
CEMENT
MOLDED
RESISTOR
SEMI
VARIABLE
RESISTOR
CHIP
RESISTOR
10
★ All voltages are measured with a 10MΩ/V DC electronic voltmeter.
★ Components having special characteristics are marked
and must be replaced
with parts having specifications equal to those originally installed.
★ Schematic diagram is subject to change without notice.
D
E
F
RX-A730
+ 2 . 5 F P G
S t a n d a r d
P S A S
M S E L 0 0 0
M S E L 1 0 1
No replacement part available.
M S E L 2 0 0
M S E L 3 0 0
R 5 1 1
M 1 7
M S E L 0
1 K
R 5 1 2
L 1 8
M S E L 1
1 K
R 5 2 4
L 1 7
M S E L 2
1 K
R 5 2 6
K 2 0
M S E L 3
1 K
R 5 1 8 1 K
+ 3 . 3 F P G
L 2
D G N D
T C K
R 5 2 0
L 5
T D I
1 0 K
L 4
T D O
+ 2 . 5 F P G
R 5 2 1
L 1
T M S
1 0 K
N _ C O N F I G
K 5
n C O N F I G
N _ S T A T U S
K 6
n S T A T U S
N _ C E
L 3
n C E
0
C O N F _ D O N E
M 1 8
C O N F _ D O N E
J 5 0 4
D C L K
K 2
D C L K
0
J 5 0 2
D A T A
K 1
I O 1 / D A T A 0
A S D I
D 1
I O 1 / A S D O / D A T A 1
N _ C S
E 2
+ 3 . 3 H
I O 1 / n C S O / F L A S H _ n C E
O U T 1 _ D [ 1 7 ]
N 2 1
I O 5 / D E V _ C L R n
O U T 1 _ D [ 1 8 ]
N 2 2
I O 5 / D E V _ O E
O U T 1 _ D [ 2 8 ]
K 2 1
I O 6 / C L K U S R
D G N D
O U T 1 _ D [ 2 5 ]
L 2 1
4
I O 6 / C R C _ E R R O R
D G N D
O U T 1 _ D [ 2 4 ]
L 2 2
I O 6 / I N I T _ D O N E
O U T 1 _ D [ 2 7 ]
K 2 2
R 5 0 5
F P G A _ 2 7 M H z
3
I O 6 / n C E O
3 3
R 5 0 3
S D R A M _ 2 7 M H z
R 5 1 5
T P 5 0 3
G 1
C L K 1
n o _ u s e
4 7 K
R 5 3 4
H R X _ C L K
T 2
C L K 2
D G N D
R 5 3 5
4 7 K
V D E C _ C L K
T 1
C L K 3
4 7 K
G 2 1
C L K 4
D G N D
G 2 2
C L K 5
A 1
T 2 1
G N D
C L K 6
A 2 2
T P 5 0 2
G N D
T 2 2
L o o p 2
C L K 7
A A 2
R 5 0 4
G N D
A 1 2
F P G A _ H 9
C L K 8
A A 2 2
2 2
B 1 2
G N D
C L K 9
A B 1
G N D
A [ 6 ]
A 1 1
C L K 1 0
A B 2 2
G N D
A [ 7 ]
B 1 1
C L K 1 1
A B 6
A B 1 2
G N D
C L K 1 2
C 1 1
G N D
A A 1 2
C L K 1 3
C 1 2
G N D
A B 1 1
C L K 1 4
C 1 4
A A 1 1
G N D
C L K 1 5
C 1 6
G N D
C 1 8
G N D
C 5
G N D
C 9
G N D
D 3
G N D
D 7
G N D
D 8
I C 5 0
G N D
E 2 0
+ 3 . 3 H
G N D
F 3
G N D
G 2
G N D
G 2 0
G N D
C 5 7 8
H 3
G N D
1 0 / 6 . 3
H 8
C 5 7 9
G N D
J 1 9
0 . 1 / 1 0 ( B J )
G N D
C 5 8 0
J 5
G N D
0 . 1 / 1 0 ( B J )
J 9
G N D
C 5 8 1
K 1 0
G N D
0 . 1 / 1 0 ( B J )
K 1 1
C 5 8 2
G N D
K 1 2
0 . 1 / 1 0 ( B J )
G N D
5 4
5 3
5 2
5 1
5 0
4 9
4 8
4 7
4 6
4 5
4 4
4 3
4 2
4 1
4 0
3 9
C 5 8 3
K 1 3
I C 5 3
N T 5 S V 8 M 1 6 H S - 6 K
G N D
1
2
3
4
5
6
7
8
9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4
K 3
0 . 1 / 1 0 ( B J )
G N D
C 5 8 4
L 1 0
G N D
0 . 1 / 1 0 ( B J )
L 1 1
C 5 8 5
G N D
L 1 2
0 . 1 / 1 0 ( B J )
G N D
L 1 3
D G N D
G N D
L 2 0
+ 3 . 3 H
SDRAM
G N D
M 1 0
G N D
M 1 1
G N D
M 1 2
G N D
5
M 1 3
G N D
N 1 0
G N D
3
R 5 0 9
+ 3 . 3 F P G
N 1 1
n o _ u s e
R 5 1 3
G N D
N 1 2
2 2
G N D
D G N D
1
N 1 3
R 5 1 4
N a n y a
: Y A 5 6 0 B 0
G N D
2
4
W i n b o n d : X 3 5 8 4 E 0
N 3
n o _ u s e
G N D
I C 5 1
E S M T
: X 9 7 4 5 C 0
P 1 9
n o _ u s e
G N D
R 3
G N D
T 2 0
G N D
U 3
G N D
V 2 0
G N D
W 3
G N D
Y 1 1
G N D
Y 1 2
G N D
Y 1 5
G N D
Y 1 6
G N D
Y 1 8
G N D
+ 3 . 3 D
+ 3 . 3 H
+ 3 . 0 F P G A
Y 2 0
G N D
Y 5
G N D
J 5 1 4
Y 9
G N D
n o _ u s e
U 5
( 2 1 2 5 )
G N D A 1
E 1 8
G N D A 2
3
1
F 5
V D D
V O U T
G N D A 3
R 5 3 3
5
V 1 8
C E
I C 5 6
G N D A 4
n o _ u s e
2
4
G N D
N C
D G N D
R 1 1 7 2 N 3 0 1 D - T R - F
Y C 8 2 7 A 0
D G N D
NOTICE
(model)
J
JAPAN
U
U.S.A
CAPACITOR
C
CANADA
REMARKS
PARTS
NAME
R
GENERAL
NO
MARK
ELECTROLYTIC
CAPACITOR
T
CHINA
TANTALUM
CAPACITOR
K
KOREA
NO
MARK
CERAMIC
CAPACITOR
A
AUSTRALIA
CERAMIC
TUBULAR
CAPACITOR
B
BRITISH
POLYESTER
FILM
CAPACITOR
G
EUROPE
POLYSTYRENE
FILM
CAPACITOR
L
SINGAPORE
MICA
CAPACITOR
E
SOUTH EUROPE
P
POLYPROPYLENE
FILM
CAPACITOR
V
TAIWAN
SEMICONDUCTIVE
CERAMIC
CAPACITOR
F
RUSSIAN
POLYPHENYLENE
SULFIDE
FILM
P
LATIN AMERICA
S
CAPACITOR
S
BRAZIL
H
THAI
G
H
B 1
I O 1
B 2
I O 1
I C 5 0
C 1
I O 1
C 2
E P 4 C E 1 5 F 2 3 C 6 N
I O 1
D 2
I O 1
Y D 9 1 7 A 0
H R X _ D [ 2 6 ]
E 1
I O 1
H R X _ D [ 2 4 ]
E 3
I O 1
H R X _ D [ 2 7 ]
F 1
I O 1
FPGA
H R X _ D [ 2 5 ]
F 2
I O 1
H R X _ D [ 2 8 ]
G 3
I O 1
H R X _ D [ 2 9 ]
G 4
I O 1
G 5
I O 1
H R X _ D [ 3 0 ]
H 1
I O 1
E 4
I O 1 / n R E S E T
H R X _ D [ 3 1 ]
H 2
I O 1
F 2 0
O U T 2 _ D [ 0 ]
H 5
I O 6 / n A V D
I C 5 0
I O 1
E 2 1
O U T 2 _ D [ 2 ]
H 6
I O 6 / n O E
I O 1
E 2 2
O U T 2 _ D [ 1 ]
E P 4 C E 1 5 F 2 3 C 6 N
I O 6 / n W E
H 7
I O 1
A 8
Y D 9 1 7 A 0
I O 8 / D A T A 2
H R X _ D [ 3 3 ]
J 1
I O 1
B 8
H R X _ D [ 3 2 ]
J 2
I O 8 / D A T A 3
I O 1
B 7
I O 8 / D A T A 4
H R X _ D [ 3 4 ]
J 3
FPGA
I O 1
A 5
I O 8 / D A T A 5
H R X _ D [ 3 5 ]
J 4
I O 1
F 1 0
J 6
I O 8 / D A T A 6
I O 1
C 6
I O 8 / D A T A 7
J 7
I O 1
B 4
I O 8 / D A T A 8
K 7
I O 1
F 8
K 8
I O 8 / D A T A 9
I O 1
A 3
I O 8 / D A T A 1 0
L 8
I O 1
B 3
I O 8 / D A T A 1 1
C 4
I O 8 / D A T A 1 2
C 7
I O 8 / D A T A 1 3
C 8
I O 8 / D A T A 1 4
B 6
I O 8 / D A T A 1 5
B 1 8
O U T 2 _ D [ 1 7 ]
I O 7 / P A D D 0
A 1 7
O U T 2 _ D [ 2 1 ]
I O 7 / P A D D 1
B 1 7
O U T 2 _ D [ 2 0 ]
I O 7 / P A D D 2
E 1 4
A _ S A D [ 4 ]
I O 7 / P A D D 3
F 1 3
A _ S A D [ 5 ]
I O 7 / P A D D 4
A 1 5
O U T 2 _ D [ 2 7 ]
I O 7 / P A D D 5
B 1 5
O U T 2 _ D [ 2 6 ]
I O 7 / P A D D 6
C 1 3
O U T 2 _ D [ 3 1 ]
I O 7 / P A D D 7
D 1 3
O U T 2 _ D [ 3 4 ]
I O 7 / P A D D 8
A 1 4
O U T 2 _ D [ 3 0 ]
I O 7 / P A D D 9
B 1 4
O U T 2 _ D [ 2 9 ]
I O 7 / P A D D 1 0
A 1 3
O U T 2 _ D [ 3 3 ]
I O 7 / P A D D 1 1
B 1 3
O U T 2 _ D [ 3 2 ]
I O 7 / P A D D 1 2
E 1 1
I O 7 / P A D D 1 3
L o o p 1
F 1 1
I O 7 / P A D D 1 4
H R X _ D [ 2 3 ]
A A 1
I O 2
B 1 0
T P 5 0 8
L 6
I O 8 / P A D D 1 5
I O 2
A 9
I O 8 / P A D D 1 6
H R X _ D [ 3 6 ]
L 7
I O 2
B 9
I O 8 / P A D D 1 7
H R X _ D E
M 1
I O 2
A 7
H R X _ H S
M 2
I O 8 / P A D D 1 8
I O 2
A 6
I O 8 / P A D D 1 9
H R X _ V S
M 3
I O 2
C 2 0
O U T 2 _ D [ 8 ]
I O 6 / P A D D 2 0
H R X _ D [ 0 ]
M 4
I O 2
B 2 1
O U T 2 _ D [ 1 0 ]
H R X _ D [ 1 ]
M 5
I O 6 / P A D D 2 1
I O 2
B 2 2
O U T 2 _ D [ 9 ]
I O 6 / P A D D 2 2
H R X _ D [ 3 9 ]
M 6
I O 2
G 1 8
O U T 2 _ D E
I O 6 / P A D D 2 3
H R X _ D [ 3 8 ]
M 7
I O 2
H R X _ D [ 3 7 ]
M 8
I O 2
H R X _ D [ 2 ]
N 1
I O 2
H R X _ D [ 3 ]
N 2
I O 2
H R X _ D [ 4 1 ]
N 5
I O 2
H R X _ D [ 4 0 ]
N 6
I O 2
H R X _ D [ 4 2 ]
N 7
R 5 3 1
I O 2
H R X _ D [ 4 3 ]
N 8
D G N D
1 K
I O 2
H R X _ D [ 5 ]
P 1
I O 2
H R X _ D [ 6 ]
P 2
I O 2
H R X _ D [ 7 ]
P 3
I O 2
H R X _ D [ 4 ]
P 4
I O 2
H R X _ D [ 4 4 ]
P 5
I O 2
H R X _ D [ 4 5 ]
P 6
I O 2
H R X _ D [ 4 6 ]
P 7
I O 2
D [ 0 ]
P 8
I O 2
H R X _ D [ 8 ]
R 1
I O 2
H R X _ D [ 9 ]
R 2
I O 2
3 8
3 7
3 6
3 5
3 4
3 3
3 2
3 1
3 0
2 9
2 8
H R X _ D [ 4 7 ]
R 5
I O 2
Y A 5 6 0 B 0
2 5
2 6
2 7
D [ 8 ]
R 6
I O 2
D [ 1 ]
R 7
I O 2
D [ 1 0 ]
R 8
I O 2
H R X _ D [ 1 1 ]
T 3
I O 2
D G N D
H R X _ D [ 1 4 ]
T 4
I O 2
H R X _ D [ 1 0 ]
T 5
I O 2
D [ 2 ]
T 7
I O 2
H R X _ D [ 1 2 ]
U 1
I O 2
H R X _ D [ 1 3 ]
U 2
I O 2
H R X _ D [ 1 5 ]
V 1
I O 2
H R X _ D [ 1 6 ]
V 2
R 5 2 8
I O 2
H R X _ D [ 1 7 ]
V 3
I O 2
n o _ u s e
H R X _ D [ 2 0 ]
V 4
I O 2
H R X _ D [ 1 8 ]
W 1
N T 5 S V 8 M 1 6 H S - 6 K
I O 2
H R X _ D [ 1 9 ]
W 2
W 9 8 1 2 G 6 J H - 6
I O 2
M 1 2 L 1 2 8 1 6 8 A - 5 T G 2 L
H R X _ D [ 2 1 ]
Y 1
I O 2
H R X _ D [ 2 2 ]
Y 2
I O 2
No replacement part available.
+ 3 . 3 D
+ 2 . 5 F P G A
+ 1 . 8 D
+ 1 . 2 F P L L
3.0
2.5
1.2
Y D 9 9 2 A 0
Y C 2 8 6 A 0
R P 1 3 0 Q 2 5 1 D - T R - F
R P 1 3 0 Q 1 2 1 D - T R - F
4
3
4
3
I C 5 5
I C 5 7
1
2
1
2
D G N D
D G N D
IC56: R1172N301D-TR-F
IC55: RP130Q251D-TR-FE
Voltage regulator
Voltage regulator
V
DD
3
V
V
DD
4
3
OUT
Vref
Vref
Current Limit
Current Limit
CE
5
CE
GND
1
2
Pin No.
Symbol
Pin No.
Symbol
Description
1
V
OUT
Output Pin
1
CE
Chip Enable ("H" Active)
2
GND
Ground Pin
Ground Pin
2
GND
3
V
DD
Input Pin
3
V
Output Pin
OUT
4
NC
No Connection
4
V
Input Pin
DD
CE
Chip Enable Pin ("H" Active)
5
I
J
K
A A 1 0
V D E C _ H S
I O 3
A A 3
V D E C _ C [ 8 ]
I O 3
A A 4
V D E C _ C [ 5 ]
I O 3
A A 5
V D E C _ C [ 2 ]
I O 3
A A 7
V D E C _ Y [ 5 ]
I O 3
A A 8
V D E C _ Y [ 4 ]
I O 3
A A 9
V D E C _ D E
I O 3
A B 1 0
V D E C _ V S
I O 3
A B 3
V D E C _ C [ 7 ]
I O 3
A B 4
V D E C _ C [ 4 ]
I O 3
A B 5
V D E C _ Y [ 9 ]
I O 3
A B 7
V D E C _ Y [ 6 ]
I O 3
A B 8
V D E C _ Y [ 3 ]
I O 3
A B 9
V D E C _ Y [ 0 ]
I O 3
R 1 0
I O 3
L 1 6
R 1 1
L o o p 6
I O 6
I O 3
L 1 5
R 1 2
I O 6
I C 5 0
I O 3
K 1 9
R 9
T P 5 0 7
I O 6
I O 3
E P 4 C E 1 5 F 2 3 C 6 N
K 1 8
O U T 1 _ D [ 2 6 ]
T 1 0
A [ 3 ]
I O 6
I O 3
K 1 7
T 1 1
Y D 9 1 7 A 0
I O 6
I O 3
K 1 6
T 8
D [ 4 ]
I O 6
I O 3
K 1 5
T 9
D [ 1 3 ]
I O 6
I O 3
FPGA
J 2 2
O U T 1 _ D [ 3 0 ]
U 1 0
A [ 1 ]
I O 6
I O 3
H 9
J 2 1
O U T 1 _ D [ 2 9 ]
U 1 1
A _ S D Q [ 0 ]
F P G A _ H 9
I O 8
I O 6
I O 3
H 1 1
J 1 8
O U T 1 _ D [ 3 1 ]
U 7
D [ 1 1 ]
I O 8
I O 6
I O 3
L o o p 5
H 1 0
J 1 7
U 8
D [ 5 ]
I O 8
I O 6
I O 3
G 9
J 1 6
U 9
D [ 7 ]
I O 8
I O 6
I O 3
G 8
J 1 5
V 1 0
A [ 2 ]
I O 8
I O 6
I O 3
G 7
H 2 2
O U T 1 _ D [ 3 3 ]
V 1 1
A _ S D Q [ 7 ]
I O 8
I O 6
I O 3
G 1 1
H 2 1
O U T 1 _ D [ 3 4 ]
V 5
D [ 3 ]
I O 8
I O 6
I O 3
G 1 0
H 2 0
O U T 1 _ D [ 3 5 ]
V 6
D [ 9 ]
I O 8
I O 6
I O 3
F 9
H 1 9
O U T 1 _ D [ 3 2 ]
V 7
D [ 1 2 ]
I O 8
I O 6
I O 3
F 7
H 1 8
V 8
D [ 6 ]
I O 8
I O 6
I O 3
E 9
H 1 7
V 9
D [ 1 5 ]
I O 8
I O 6
I O 3
E 7
H 1 6
W 1 0
V D E C _ C [ 1 ]
I O 8
I O 6
I O 3
E 6
G 1 7
A _ S A D [ 1 2 ]
W 6
V D E C _ Y [ 8 ]
I O 8
I O 6
I O 3
E 5
F 2 2
O U T 2 _ V S
W 7
D [ 1 4 ]
I O 8
I O 6
I O 3
E 1 0
F 2 1
O U T 2 _ C L K
V D E C _ Y [ 1 ]
W 8
I O 8
I O 6
I O 3
D 6
F 1 9
O U T 2 _ H S
Y 1 0
V D E C _ C [ 0 ]
I O 8
I O 6
I O 3
D 1 0
F 1 7
O U T 2 _ D [ 2 2 ]
Y 3
V D E C _ C [ 9 ]
I O 8
I O 6
I O 3
C 3
D 2 2
O U T 2 _ D [ 3 ]
Y 4
V D E C _ C [ 6 ]
I O 8
I O 6
I O 3
C 1 0
D 2 1
O U T 2 _ D [ 4 ]
Y 6
V D E C _ C [ 3 ]
I O 8
I O 6
I O 3
B 5
D 2 0
O U T 2 _ D [ 5 ]
Y 7
V D E C _ Y [ 7 ]
I O 8
I O 6
I O 3
A 4
C 2 2
O U T 2 _ D [ 6 ]
Y 8
V D E C _ Y [ 2 ]
I O 8
I O 6
I O 3
A 1 0
C 2 1
O U T 2 _ D [ 7 ]
I O 8
I O 6
A A 1 3
A _ S n W E
I O 4
Y 2 2
O U T 1 _ V S
A A 1 4
A _ S L D Q M
I O 5
I O 4
Y 2 1
O U T 1 _ H S
A A 1 5
A _ S D Q [ 3 ]
I O 5
I O 4
W 2 2
O U T 1 _ D [ 1 ]
A A 1 6
A _ S D Q [ 2 ]
I O 5
I O 4
W 2 1
O U T 1 _ D [ 0 ]
A A 1 7
A _ S D Q [ 1 3 ]
I O 5
I O 4
W 2 0
O U T 1 _ C L K
A A 1 8
A _ S D Q [ 1 0 ]
I O 5
I O 4
W 1 9
O U T 1 _ D [ 2 ]
A A 1 9
A _ S D Q [ 9 ]
I O 5
I O 4
V 2 2
O U T 1 _ D [ 4 ]
A A 2 0
A _ S U D Q M
I O 5
I O 4
V 2 1
O U T 1 _ D [ 3 ]
A B 1 3
A _ S n C A S
I O 5
I O 4
U 2 2
O U T 1 _ D [ 7 ]
A B 1 4
A _ S D Q [ 6 ]
I O 5
I O 4
U 2 1
O U T 1 _ D [ 6 ]
A B 1 5
A _ S D Q [ 4 ]
I O 5
I O 4
U 2 0
O U T 1 _ D [ 5 ]
A B 1 6
A _ S D Q [ 1 ]
I O 5
I O 4
A _ S A D [ 1 3 ]
H 1 5
U 1 9
O U T 1 _ D [ 8 ]
A B 1 7
A _ S D Q [ 1 4 ]
I O 7
I O 5
I O 4
A _ S A D [ 0 ]
H 1 4
T 1 8
O U T 1 _ D [ 9 ]
A B 1 8
A _ S D Q [ 1 1 ]
I O 7
I O 5
I O 4
A _ S A D [ 9 ]
H 1 3
T 1 7
A B 1 9
A _ S D Q [ 8 ]
I O 7
I O 5
I O 4
H 1 2
R 2 2
O U T 1 _ D [ 1 2 ]
A B 2 0
A _ S C K E
I O 7
I O 5
I O 4
A _ S A D [ 1 0 ]
G 1 6
R 2 1
O U T 1 _ D [ 1 1 ]
R 1 3
I O 7
I O 5
I O 4
A _ S A D [ 3 ]
G 1 5
R 2 0
I O 7
L o o p 2
R 1 4
I O 5
I O 4
A _ S A D [ 1 ]
G 1 4
R 1 9
O U T 1 _ D [ 1 0 ]
R 1 5
I O 7
I O 5
I O 4
A _ S A D [ 6 ]
G 1 3
R 1 8
O U T 1 _ D [ 1 3 ]
R 1 6
E X _ C K _ N _ E N
I O 7
I O 5
I O 4
L o o p 3
G 1 2
R 1 7
T 1 2
I O 7
I O 5
I O 4
A _ S A D [ 2 ]
F 1 6
P 2 2
O U T 1 _ D [ 1 5 ]
T 1 4
I O 7
I O 5
I O 4
A _ S A D [ 8 ]
F 1 5
P 2 1
O U T 1 _ D [ 1 4 ]
T 1 5
I O 7
I O 5
I O 4
A _ S A D [ 7 ]
F 1 4
P 2 0
T 1 6
A _ R A M C L K
I O 7
I O 5
I O 4
F 1 2
P 1 7
U 1 2
I O 7
I O 5
I O 4
A _ S A D [ 1 1 ]
E 1 6
P 1 6
U 1 3
I O 7
I O 5
I O 4
O U T 2 _ D [ 2 8 ]
E 1 5
P 1 5
U 1 4
I O 7
I O 5
I O 4
E 1 3
P 1 4
U 1 5
I O 7
I O 5
I O 4
O U T 2 _ D [ 3 5 ]
E 1 2
N 2 0
O U T 1 _ D [ 1 6 ]
V 1 2
I O 7
I O 5
I O 4
O U T 2 _ D [ 1 6 ]
D 1 9
N 1 9
O U T 1 _ D [ 1 9 ]
V 1 3
I O 7
I O 5
I O 4
D 1 7
N 1 8
V 1 4
I O 7
I O 5
I O 4
O U T 2 _ D [ 2 5 ]
D 1 5
N 1 7
V 1 5
I O 7
I O 5
I O 4
O U T 2 _ D [ 1 3 ]
C 1 9
N 1 6
V 1 6
A [ 5 ]
I O 7
I O 5
I O 4
O U T 2 _ D [ 1 9 ]
C 1 7
N 1 5
W 1 3
A _ S n C S
I O 7
I O 5
I O 4
C 1 5
N 1 4
W 1 4
A [ 4 ]
I O 7
I O 5
I O 4
O U T 2 _ D [ 1 1 ]
B 2 0
M 2 2
O U T 1 _ D [ 2 1 ]
W 1 5
A _ S D Q [ 5 ]
I O 7
I O 5
I O 4
O U T 2 _ D [ 1 4 ]
B 1 9
M 2 1
O U T 1 _ D [ 2 2 ]
W 1 7
A _ S D Q [ 1 5 ]
I O 7
I O 5
I O 4
O U T 2 _ D [ 2 3 ]
B 1 6
M 2 0
O U T 1 _ D [ 2 3 ]
Y 1 3
A _ S n R A S
I O 7
I O 5
I O 4
O U T 2 _ D [ 1 2 ]
A 2 0
M 1 9
O U T 1 _ D [ 2 0 ]
Y 1 7
A _ S D Q [ 1 2 ]
I O 7
I O 5
I O 4
O U T 2 _ D [ 1 5 ]
A 1 9
M 1 6
I O 7
I O 5
O U T 2 _ D [ 1 8 ]
A 1 8
M 1 5
I O 7
I O 5
O U T 2 _ D [ 2 4 ]
A 1 6
A A 2 1
O U T 1 _ D E
I O 7
I O 5
No replacement part available.
S h e e t 3 : F P G A
IC53: NT5SV8M16HS-6K
128 Mb synchronous DRAM
I C / C B / X L : 4 5 - 5 9
S W
: 4 5 - 5 9
CKE
37
O H T E R
: 4 5 0 - 5 9 9
CK
38
CS
19
WE
16
CAS
17
RAS
18
IC57: RP130Q121D-TR-F
Voltage regulator
V
1
OUT
V
DD
4
3
V
OUT
Vref
20-26,29-35
Current Limit
A0-A11,
2
GND
CE
GND
BA0,BA1
1
2
Description
Pin No.
Symbol
Description
1
CE
Chip Enable ("H" Active)
2
GND
Ground Pin
3
V
OUT
Output Pin
4
V
DD
Input Pin
L
M
N
RX-V675/HTR-6066/RX-A730/TSR-6750
H T X 1 _ C L K , H T X 1 _ D [ 0 - 3 5 ] , H T X 1 _ D E , H T X 1 _ H S , H T X 1 _ V S
t o 0 0 4 . s h t
H T X 2 _ C L K , H T X 2 _ D [ 0 - 3 5 ] , H T X 2 _ D E , H T X 2 _ H S , H T X 2 _ V S
( H D M I T x )
R 5 7 2
to DIGITAL 4/8
O U T 1 _ D [ 3 5 ]
2 2 X 4
H T X 1 _ D [ 3 5 ]
O U T 1 _ D [ 3 4 ]
H T X 1 _ D [ 3 4 ]
O U T 1 _ D [ 3 3 ]
H T X 1 _ D [ 3 3 ]
O U T 1 _ D [ 3 2 ]
H T X 1 _ D [ 3 2 ]
R 5 7 3
O U T 1 _ D [ 3 1 ]
2 2 X 4
H T X 1 _ D [ 3 1 ]
O U T 1 _ D [ 3 0 ]
H T X 1 _ D [ 3 0 ]
O U T 1 _ D [ 2 9 ]
H T X 1 _ D [ 2 9 ]
O U T 1 _ D [ 2 8 ]
H T X 1 _ D [ 2 8 ]
R 5 7 4
2 2 X 4
O U T 1 _ D [ 2 7 ]
H T X 1 _ D [ 2 7 ]
O U T 1 _ D [ 2 6 ]
H T X 1 _ D [ 2 6 ]
O U T 1 _ D [ 2 5 ]
H T X 1 _ D [ 2 5 ]
O U T 1 _ D [ 2 4 ]
H T X 1 _ D [ 2 4 ]
R 5 7 5
2 2 X 4
O U T 1 _ D [ 2 3 ]
H T X 1 _ D [ 2 3 ]
O U T 1 _ D [ 2 2 ]
H T X 1 _ D [ 2 2 ]
O U T 1 _ D [ 2 1 ]
H T X 1 _ D [ 2 1 ]
O U T 1 _ D [ 2 0 ]
H T X 1 _ D [ 2 0 ]
R 5 7 6
2 2 X 4
O U T 1 _ D [ 1 9 ]
H T X 1 _ D [ 1 9 ]
O U T 1 _ D [ 1 8 ]
H T X 1 _ D [ 1 8 ]
O U T 1 _ D [ 1 7 ]
H T X 1 _ D [ 1 7 ]
O U T 1 _ D [ 1 6 ]
H T X 1 _ D [ 1 6 ]
R 5 7 7
2 2 X 4
O U T 1 _ D [ 1 5 ]
H T X 1 _ D [ 1 5 ]
O U T 1 _ D [ 1 4 ]
H T X 1 _ D [ 1 4 ]
O U T 1 _ D [ 1 3 ]
H T X 1 _ D [ 1 3 ]
O U T 1 _ D [ 1 2 ]
H T X 1 _ D [ 1 2 ]
R 5 7 8
2 2 X 4
O U T 1 _ D [ 1 1 ]
H T X 1 _ D [ 1 1 ]
O U T 1 _ D [ 1 0 ]
H T X 1 _ D [ 1 0 ]
O U T 1 _ D [ 9 ]
H T X 1 _ D [ 9 ]
O U T 1 _ D [ 8 ]
H T X 1 _ D [ 8 ]
R 5 7 9
O U T 1 _ D [ 7 ]
2 2 X 4
H T X 1 _ D [ 7 ]
O U T 1 _ D [ 6 ]
H T X 1 _ D [ 6 ]
O U T 1 _ D [ 5 ]
H T X 1 _ D [ 5 ]
O U T 1 _ D [ 4 ]
H T X 1 _ D [ 4 ]
R 5 8 0
O U T 1 _ D [ 3 ]
2 2 X 4
H T X 1 _ D [ 3 ]
O U T 1 _ D [ 2 ]
H T X 1 _ D [ 2 ]
O U T 1 _ D [ 1 ]
H T X 1 _ D [ 1 ]
O U T 1 _ D [ 0 ]
H T X 1 _ D [ 0 ]
O U T 1 _ C L K
R 5 3 7 2 2
H T X 1 _ C L K
R 5 3 8 2 2
O U T 1 _ V S
H T X 1 _ V S
R 5 3 9 2 2
O U T 1 _ H S
H T X 1 _ H S
O U T 1 _ D E
R 5 4 0 2 2
H T X 1 _ D E
R 5 8 1
n o _ u s e
O U T 2 _ D [ 3 5 ]
H T X 2 _ D [ 3 5 ]
O U T 2 _ D [ 3 4 ]
H T X 2 _ D [ 3 4 ]
O U T 2 _ D [ 3 3 ]
H T X 2 _ D [ 3 3 ]
O U T 2 _ D [ 3 2 ]
H T X 2 _ D [ 3 2 ]
R 5 8 2
n o _ u s e
O U T 2 _ D [ 3 1 ]
H T X 2 _ D [ 3 1 ]
O U T 2 _ D [ 3 0 ]
H T X 2 _ D [ 3 0 ]
O U T 2 _ D [ 2 9 ]
H T X 2 _ D [ 2 9 ]
O U T 2 _ D [ 2 8 ]
H T X 2 _ D [ 2 8 ]
R 5 8 3
n o _ u s e
O U T 2 _ D [ 2 7 ]
H T X 2 _ D [ 2 7 ]
O U T 2 _ D [ 2 6 ]
H T X 2 _ D [ 2 6 ]
O U T 2 _ D [ 2 5 ]
H T X 2 _ D [ 2 5 ]
O U T 2 _ D [ 2 4 ]
H T X 2 _ D [ 2 4 ]
R 5 8 4
n o _ u s e
O U T 2 _ D [ 2 3 ]
H T X 2 _ D [ 2 3 ]
O U T 2 _ D [ 2 2 ]
H T X 2 _ D [ 2 2 ]
O U T 2 _ D [ 2 1 ]
H T X 2 _ D [ 2 1 ]
O U T 2 _ D [ 2 0 ]
H T X 2 _ D [ 2 0 ]
R 5 8 5
n o _ u s e
O U T 2 _ D [ 1 9 ]
H T X 2 _ D [ 1 9 ]
O U T 2 _ D [ 1 8 ]
H T X 2 _ D [ 1 8 ]
O U T 2 _ D [ 1 7 ]
H T X 2 _ D [ 1 7 ]
O U T 2 _ D [ 1 6 ]
H T X 2 _ D [ 1 6 ]
R 5 8 6
n o _ u s e
O U T 2 _ D [ 1 5 ]
H T X 2 _ D [ 1 5 ]
O U T 2 _ D [ 1 4 ]
H T X 2 _ D [ 1 4 ]
O U T 2 _ D [ 1 3 ]
H T X 2 _ D [ 1 3 ]
O U T 2 _ D [ 1 2 ]
H T X 2 _ D [ 1 2 ]
R 5 8 7
n o _ u s e
O U T 2 _ D [ 1 1 ]
H T X 2 _ D [ 1 1 ]
O U T 2 _ D [ 1 0 ]
H T X 2 _ D [ 1 0 ]
O U T 2 _ D [ 9 ]
H T X 2 _ D [ 9 ]
O U T 2 _ D [ 8 ]
H T X 2 _ D [ 8 ]
R 5 8 8
n o _ u s e
O U T 2 _ D [ 7 ]
H T X 2 _ D [ 7 ]
O U T 2 _ D [ 6 ]
H T X 2 _ D [ 6 ]
O U T 2 _ D [ 5 ]
H T X 2 _ D [ 5 ]
O U T 2 _ D [ 4 ]
H T X 2 _ D [ 4 ]
R 5 8 9
n o _ u s e
O U T 2 _ D [ 3 ]
H T X 2 _ D [ 3 ]
O U T 2 _ D [ 2 ]
H T X 2 _ D [ 2 ]
O U T 2 _ D [ 1 ]
H T X 2 _ D [ 1 ]
O U T 2 _ D [ 0 ]
H T X 2 _ D [ 0 ]
R 5 4 1
O U T 2 _ C L K
H T X 2 _ C L K
n o _ u s e
O U T 2 _ V S
R 5 4 2
H T X 2 _ V S
n o _ u s e
O U T 2 _ H S
R 5 4 3
H T X 2 _ H S
n o _ u s e
R 5 4 4
O U T 2 _ D E
H T X 2 _ D E
n o _ u s e
DIGITAL (1)
V 7 7 5 / A 8 3 0 o n l y
to DIGITAL 5/8
H D M I _ P O N
t o 0 0 5 . s h t
( u - C o m )
Bank3
Bank2
Bank1
15,39
2
2
Mode
LDQM,UDQM
12
Registers
Memory Bank 0
Memory Array
(4096 x 512 x 16)
16
16
DATA
OUTPUT
12
REGISTERS
Sense Amplifiers
2,4,5,7,8,10,11,13,
42,44,45,47,48,50,51,53
16
DQ0-DQ15
I/O Gating
2
DM Mask Logic
14
DATA
16
16
512
INPUT
2
(x16)
REGISTERS
Column
Decoder
9
9
Column-Address
Counter/Latch
129
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