Memory Expansion Port (Port A); General Purpose I/O (Port B, Port C); Ssi0 And Ssi1 - Motorola DSP56156 Manual

lel port to a host microprocessor or DMA controller and can provide debugging facilities
via host exceptions.
Port C is a 12-pin I/O interface which may be used as general purpose I/O pins or as pins
for a Timer and two identical Synchronous Serial Interface.
The sigma-delta codec has seven dedicated pins which are not available as general pur-
pose I/O. Both analog to digital (A/D) and digital to analog (D/A) converters are provided
on-chip. The final decimation, antialiasing and compensation filters for the A/D and inter-
polation, reconstruction, and compensation filters for the D/A converter are implemented
in software on the DSP which provides the user considerable flexibility in the codec filter
characteristics. An external Vref pin allows multiple codecs to be referenced from a single,
common voltage reference source.
1.4.1

Memory Expansion Port (Port A)

The DSP56156 expansion port is designed to synchronously interface over a common
16-bit data bus with a wide variety of memory and peripheral devices such as high
speed static RAMs, slower memory devices, and other DSPs and MPUs in master/slave
configurations. This capability is possible because the external bus cycle time is pro-
grammable. The expansion bus timing is controlled by a bus control register (BCR). The
BCR controls the timing of the bus interface signals, and the data lines. Each of two
memory spaces X data and Program data has its own 5-bit BCR which can be pro-
grammed for up to 31 WAIT states (one WAIT state is equal to a clock period or equiv-
alently, one-half of an instruction cycle). In this way, external bus timing can be tailored
to match the speed requirements of the different memory spaces.
1.4.2

General Purpose I/O (Port B, Port C)

Each Port B and C pin may be programmed as a general purpose I/O pin or as a dedicated
on-chip peripheral pin under software control. A 12-bit port control register, PCC, is asso-
ciated with Port C and allows each port pin to be programmed individually for one of these
two functions. The port control register associated with Port B, PBC, contains only one bit
which programs all 15 pins. Also associated with each general purpose port is a data di-
rection register which programs each pin as an input or output, and a data register for data
I/O. Note that these registers are read/write making the use of bit manipulation instruc-
tions extremely effective.
1.4.3

SSI0 and SSI1

The DSP56156 provides two identical Synchronous Serial Interfaces (SSI's). They are ex-
tremely flexible, full-duplex serial interfaces which allow the DSP56156 to communicate
with a variety of serial devices. These interfaces include one or more industry standard
MOTOROLA
EXTERNAL BUS, I/O, AND ON-CHIP PERIPHERALS
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