Sony CXD5602 User Manual page 60

Table I/O Configuration-11 shows pin functions selected by IOCSYS_IOMD0 and IOSYS_IOMD1.
Table I/O Configuration-11 Table of Role Selection for I/O Pins Belonging to SYS Group
Pin Register
Name Name
P10_00 IOCSYS_IOMD0.I2C4
P10_01
P11_00 IOCSYS_IOMD0.PMIC_INT
P12_00 IOCSYS_IOMD0.RTC_IRQ_OUT
P13_00 IOCSYS_IOMD0.AP_CLK
P14_00 IOCSYS_IOMD0.GNSS_1PPS_OUT
P16_00 IOCSYS_IOMD0.SPI0A
P16_01
P17_00 IOCSYS_IOMD0.SPI0B
P17_01
P18_00 IOCSYS_IOMD0.SPI1A
P18_01
P18_02
P18_03
P19_00 IOCSYS_IOMD0.SPI1B
P19_01
P00_00 IOCSYS_IOMD0.SPI2A
P00_01
P01_00 IOCSYS_IOMD0.SPI2B
P01_01
P02_00 IOCSYS_IOMD0.HIFIRQ
P03_00 IOCSYS_IOMD0.HIFEXT
P1e_00 IOCSYS_IOMD1.SEN_IRQ_IN
P1f_00 IOCSYS_IOMD1.SPI3_CS0_X
P1g_00 IOCSYS_IOMD1.SPI3_CS1_X
P1h_00 IOCSYS_IOMD1.SPI3_CS2_X
Register Setting value
0 1
GPIO I2C_BCK
GPIO I2C_BDT
GPIO PMIC_INT
GPIO RTC_IRQ_OUT
GPIO AP_CLK
GPIO GNSS_1PPS_O
UT
GPIO UART1_TXD
GPIO UART1_RXD
GPIO I2C2_BCK
GPIO I2C2_BDT
GPIO SPI1_CS_X
GPIO SPI1_SCK
GPIO SPI0_IO0
GPIO SPI0_IO1
GPIO SPI1_IO2
GPIO SPI1_IO3
GPIO SPI2_CS_X
GPIO SPI2_SCK
GPIO SPI2_MOSI
GPIO SPI2_MISO
GPIO HIF_IRQ_OUT
GPIO GPIO
GPIO SEN_IRQ_IN
GPIO SPI3_CS0_X
GPIO SPI3_CS1_X
GPIO SPI3_CS2_X
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CXD5602 User Manual
2 3
GPIO GPIO
GPIO GPIO
RTC_IRQ_OUT GPIO
(Open Drain)
with PMIC_INT
(Open Drain)
RTC_IRQ_OUT GPIO
(Open Drain)
PMU_WDT PMU_WDT
(Open Drain)
CPU_WDT CPU_WDT
(Open Drain)
SPI0_CS_X Reserved
SPI0_SCK Reserved
SPI0_MOSI Reserved
SPI0_MISO Reserved
SPI0_CS_X Reserved
SPI0_SCK Reserved
SPI0_MOSI Reserved
SPI0_MISO Reserved
GPIO Reserved
GPIO Reserved
UART0_TXD I2C3_BCK
UART0_RXD I2C3_BDT
UART0_CTS GPIO
UART0_RTS GPIO
HIF_IRQ_OUT GNSS_1PPS_OU
(Open Drain) T
GPIO GPS_EXTLD
Reserved Reserved
Reserved Reserved
Reserved Reserved
Reserved Reserved