Sony CXD5602 User Manual page 966

SCU Clock(Hz) HPADC(Hz)
32,768 0
8,192,000 16,384
13,000,000 16,384
The following describes the sensor conditions with sensor operation.

Six byte read transfer per event for each sensor (three axes are assumed)
The SPI's transfer rate is about 4 Mbps, the I2C's transfer rate is about 400 Kbps (The SPI's is about 16
Kbps, the I2C's is about 1.4 Kbps when the clock is 32 kHz.)
3.21.11 Synchronization Function with PWM
3.21.11.1 PWM Output Based on ADC
The PWM output can be performed based on the AD data confirmation signals (synchronization signals) from the
ADC (LPADC/HPADC). For details, refer to Section 3.9.11, PWM Control described in Chapter of the SCU.
3.21.11.2 ADC Data Import Based on the PWM Output
Based on the rise of the PWM output, timing of importing the ADC data in the SCU can be controlled. For details,
refer to Section of PWM Control described in Chapter of the SCU (3.9).
3.21.12 ADC Control Register Details
3.21.12.1 SCU_ADCIF_REG
The following describes the 32 bit address offset. Add this address to the offset addresses in the table shown
below to calculate the address from the CPU.
Offset:0x0018dc00 (Mirror:0x0418dc00)
Table ADC-779 ADC Sensor Sampling Frequency Estimation
LPADC(Hz)
0
250
250
－966/1010－
SPI Sensor (Hz) I2C Sensor (Hz)
16 0
1,500 500
3,500 1,000
CXD5602 User Manual