Read A/D Register Rareg/Rdreg; Write A/D Register (Wareg/Wdreg); Read System Register Rsreg; Write System Register Wsreg - Motorola MC68340 User Manual

Integrated processor with dma
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Command
Read A/D Register
Write A/D Register
Read System Register
Write System Register
Read Memory Location
Write Memory Location
Dump Memory Block
Fill Memory Block
Resume Execution
Call User Code
Reset Peripherals
No Operation
5.6.2.8.4 Read A/D Register (RAREG/RDREG). Read the selected address or data
register and return the results via the serial interface.
Command Format:
15
14
13
12
0
0
1
0
Command Sequence:
Operand Data:
None
5-76
Freescale Semiconductor, Inc.
Table 5-23. BDM Command Summary
Mnemonic
Read the selected address or data register and return the results
RAREG/RDREG
via the serial interface.
WAREG/WDREG The data operand is written to the specified address or data
register.
The specified system control register is read. All registers that can
RSREG
be read in supervisor mode can be read in BDM.
The operand data is written into the specified system control
WSREG
register.
Read the sized data at the memory location specified by the long-
READ
word address. The SFC register determines the address space
accessed.
Write the operand data to the memory location specified by the
WRITE
long-word address. The DFC register determines the address
space accessed.
Used in conjunction with the READ command to dump large blocks
DUMP
of memory. An initial READ is executed to set up the starting
address of the block and to retrieve the first result. Subsequent
operands are retrieved with the DUMP command.
Used in conjunction with the WRITE command to fill large blocks of
FILL
memory. An initial WRITE is executed to set up the starting
address of the block and to supply the first operand. Subsequent
operands are written with the FILL command.
The pipeline is flushed and refilled before resuming instruction
GO
execution at the return PC.
Current PC is stacked at the location of the current SP. Instruction
CALL
execution begins at user patch code.
Asserts RESET for 512 clock cycles. The CPU is not reset by this
RST
command. Synonymous with the CPU RESET instruction.
NOP performs no operation and may be used as a null command.
NOP
11
10
9
8
0
0
0
1
RDREG/RAREG
???
MC68340 USER'S MANUAL
For More Information On This Product,
Go to: www.freescale.com
Description
7
6
5
4
1
0
0
0
XXX
NEXT CMD
MS RESULT
LS RESULT
XXX
NEXT CMD
"ILLEGAL"
"NOT READY"
3
2
1
0
A/D
REGISTER
MOTOROLA

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